Director - STA - Austin (Oakhill, Office), United States
Originally posted 26 September 2026 by the employer.
About the role
This role involves leading Static Timing Analysis (STA) activities for MPU SoCs within the AI and Chip Engineering SoC Implementation team. The team focuses on AI, Edge, and Automotive Processors.
What you'll do
- Develop, implement, and verify STA constraints.
- Efficiently close timing at subsystem and SoC levels.
- Contribute to timing flow and methodology improvements.
- Collaborate with RTL and IP design teams for timing fixes.
- Coordinate with SOC design functions including RTL, DV, DFT, and EDA vendors.
- Influence early design decisions by partnering with Architecture and RTL teams.
What you'll need
- 15+ years of experience in Physical Design for complex SoCs.
- 3+ years of experience in STA Lead roles.
- Expertise in developing, implementing, and verifying STA constraints.
- Expertise in efficient closure of Subsystem as well as SoC-level timing.
- In-depth knowledge of industry standards and practices in Timing closure, Physical Design, Floor-planning, and Place & Route.
- Deep understanding of advanced topics such as crosstalk, noise, OCV, timing margins, Clock specs, jitter, IR drop, and spice analysis.
- Experience working with multi-site teams.
- BS or MS in Electrical or Computer Engineering.
Skills: Static Timing Analysis, timing closure, Physical Design, Floor-planning, Place & Route
This role has been open 14 days — well below the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
683
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NXP Semiconductors | All employers we track in this specialty (683 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 22 | 683 |
| Open roles in the wider Physical Implementation family | 44 | 1473 · 107 employers |
| Median days open | 37 d | 60 d (−23 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: Static Timing Analysis, timing closure, Physical Design, Floor-planning, Place & Route
Who's hiring in this category
- Qualcomm · 131 open roles · median 39 d
- AMD · 62 open roles · median 18 d
- NVIDIA · 42 open roles · median 64 d
- Broadcom · 36 open roles · median 89 d
- Synopsys · 35 open roles · median 40 d
- Intel Corporation · 29 open roles · median 10 d
How we counted: 683 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.