Director of ASIC Design - Remote
$200,000 - $350,000 USD yearly
This role focuses on AI inference chips.
About the role
This role involves leading the design, development, verification, and execution of high-performance AI inference chips. You will play a central role in shaping the technical direction and execution of Positron AI's silicon roadmap.
What you'll do
- Lead the ASIC development team in the design, verification, and implementation of AI inference hardware.
- Define and specify ASIC architecture, microarchitecture, and roadmap.
- Optimize power, performance, and area (PPA) trade-offs for AI inference requirements, including memory subsystem optimizations.
- Oversee RTL design, physical design, verification, and validation processes.
- Drive Customer Owned Tooling (COT) tape-out and bring-up activities.
- Collaborate with software and prototyping teams and manage relationships with foundries, IP vendors, and EDA tool providers.
What you'll need
- Degree in Electrical Engineering, Computer Engineering, or a related field.
- 12+ years of experience in ASIC development, with at least 5 years in a leadership role.
- Proven track record of delivering multiple ASIC/COT projects from concept to mass production.
- Deep understanding of digital design, verification, physical design, and manufacturing processes.
- Experience with leading AI accelerators, high-performance computing (HPC), or data center chip designs.
- Strong knowledge of RTL design (Verilog/SystemVerilog), synthesis, and timing closure.
- Expertise in low-power design techniques and optimizing power for very high-performance chips.
- Expertise in memory subsystem optimizations.
- Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics.
Nice to have
- Experience in AI/ML accelerator design or custom AI silicon.
- Track record of defining and deploying a full EDA methodology based on Cadence or Synopsys tool suites.
- Successful tape-out experience on 7nm, 5nm, and/or 3nm COT designs.
- Understanding of chiplet-based architectures and heterogeneous computing.
- Experience integrating external memory and IP modules.
- Knowledge of RISC-V or custom processor development.
- Track record of successful technology development within a dynamic startup environment.
Skills: ASIC architecture, AI inference hardware, RTL design, physical design, COT tape-out, PPA optimization
This role has been open 20 days — well below the 67-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
522
|
Median days open
67 d
|
Median salary
$235k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Positron AI | All employers we track in this specialty (522 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 522 |
| Open roles in the wider Software, Firmware & Systems family | 6 | 5873 · 143 employers |
| Median days open | 21 d | 67 d (−46 d vs this employer) |
| Median salary (USD postings) | — | $235k |
Skills observed across this category: ASIC architecture, AI inference hardware, RTL design, physical design, COT tape-out, PPA optimization
Who's hiring in this category
- Qualcomm · 107 open roles · median 97 d
- NVIDIA · 86 open roles · median 68 d
- AMD · 46 open roles · median 60 d
- Micron Technology · 32 open roles · median 40 d
- Mobileye · 25 open roles · median 54 d
- Analog Devices · 14 open roles · median 25 d
How we counted: 522 open AI/ML Hardware Engineering (AI ML Hardware) roles from 76 employers tracked in the SemiconductorJobs index, counted 22 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.