Digital ASIC Architect - San Francisco Bay Area, United States
Originally posted 8 October 2026 by the employer.
About the role
This role defines the digital architecture for motion sensing ASICs from concept through silicon, delivering sensing experiences across Apple's product line.
What you'll do
- Own the digital architecture of motion sensing ASICs from concept through silicon.
- Analyze applications to define cost and power optimized digital systems around processors, DSP cores, and custom control engines.
- Translate high-level user and product requirements into a realizable system.
- Build high-level models to prove out the architecture.
- Author detailed specifications that drive IC development.
- Work with cross-functional teams to identify critical interactions between the ASIC and the broader product.
What you'll need
- BS in Electrical Engineering or related field with a minimum of 10 years of relevant industry experience.
- Excellent written and verbal communication skills.
Nice to have
- Deep expertise in digital ASIC architecture for sensor or mixed-signal systems, including processor and DSP sub-system definition, memory and bus architecture, and custom control engine micro-architecture.
- Proven track record of defining and taping out high-volume, complex digital and mixed-signal ICs from architecture through production.
- Strong foundation in system-level design, requirements development, and hardware/firmware partitioning for sensing or low-power embedded applications.
- Experience developing sensing algorithms and signal processing pipelines, with modeling skills to evaluate them before silicon.
- Experience with IC bring-up, silicon characterization, and system-level debug.
- Proficiency in MATLAB, Python, C/C++, or SystemC for high-level modeling and simulation.
Skills: Digital ASIC architecture, Processor sub-system definition, Memory and bus architecture, Custom control engine micro-architecture, System-level design
This role has been open 2 days — well below the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
455
|
Median days open
78 d
|
Median salary
$235k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (455 roles · 63 employers) |
|---|---|---|
| Open roles in this specialty | 34 | 455 |
| Open roles in the wider Digital Design & Verification family | 70 | 3165 · 114 employers |
| Median days open | 5 d | 78 d (−73 d vs this employer) |
| Median salary (USD postings) | — | $235k |
Skills observed across this category: Digital ASIC architecture, Processor sub-system definition, Memory and bus architecture, Custom control engine micro-architecture, System-level design
Who's hiring in this category
- Qualcomm · 74 open roles · median 82 d
- NVIDIA · 58 open roles · median 65 d
- AMD · 34 open roles · median 60 d
- Apple (this employer) · 34 open roles · median 5 d
- Arm Holdings · 27 open roles · median 108 d
- NXP Semiconductors · 21 open roles · median 110 d
How we counted: 455 open SoC/Chip Architecture (SOC Architecture) roles from 63 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.