DFT Tech Lead - Austin, Texas, United States
Originally posted 14 January 2026 by the employer.
About the role
Retym is hiring a DFT Tech Lead to define, implement, and deploy design-for-test (DFT) methodologies for complex digital and mixed-signal chips. In this role, you will define silicon test strategies, establish DFT/DFD architecture, and deliver DFT and Debug specifications for complex SoCs.
What you'll do
- Define, implement, and deploy advanced DFT methodologies across complex digital and mixed-signal chips. - Collaborate with backend, VLSI, verification, and analog design teams. - Define silicon test strategies and overall DFT/DFD architecture. - Create comprehensive DFT and Debug specifications for complex SoCs.
What you'll need
- Experience defining and deploying DFT methodologies for digital and mixed-signal chips. - Background developing silicon test strategies and DFT/DFD architecture. - Experience delivering DFT and Debug specifications for complex SoCs. - Demonstrated technical leadership collaborating with backend, VLSI, verification, and analog teams.
Skills: DFT methodologies, silicon test strategies, DFT/DFD architecture, mixed-signal chips, SoCs
This role has been open 88 days — well above the 59-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
243
|
Median days open
59 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Retym | All employers we track in this specialty (243 roles · 53 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 243 |
| Open roles in the wider Digital Design & Verification family | 16 | 3224 · 116 employers |
| Median days open | 88 d | 59 d (+29 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Skills observed across this category: DFT methodologies, silicon test strategies, DFT/DFD architecture, mixed-signal chips, SoCs
Who's hiring in this category
- AMD · 40 open roles · median 42 d
- NVIDIA · 23 open roles · median 37 d
- Qualcomm · 23 open roles · median 102 d
- NXP Semiconductors · 18 open roles · median 67 d
- Synopsys · 14 open roles · median 26 d
- Micron Technology · 10 open roles · median 66 d
How we counted: 243 open DFT Engineering (DFT Test) roles from 53 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.