DFT Engineer - Remote
$100,000 - $500,000 USD yearly
Originally posted 30 June 2026 by the employer.
About the role
Tenstorrent is hiring a DFT Engineer responsible for DFT implementation using industry-standard tools for high-speed CPU core design. The role focuses on designing and integrating multiple chiplets into a System-in-Package in collaboration with global teams.
What you'll do
- Build and execute chip-level DFT strategies for high-speed CPU core designs and multi-chiplet System-in-Package programs. - Implement and verify DFT features including scan chains, memory BIST, and JTAG to support manufacturing test and silicon debug. - Partner with RTL, physical design, and verification teams to ensure testability throughout the design flow. - Script, automate, and analyze DFT flows using industry-standard EDA tools, including ATPG and fault coverage reporting.
What you'll need
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science, along with 10+ years of relevant DFT experience. - Hands-on experience with industry-standard DFT tools such as Synopsys and Siemens. - Experience scripting in TCL and Python. - Expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff of inserted DFT logic. - Demonstrated ability to assess risk, communicate resource needs, and collaborate cross-functionally in complex technical environments.
Skills: DFT implementation, scan chains, memory BIST, JTAG, ATPG, fault coverage
This role has been open 113 days — well above the 61-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
248
|
Median days open
61 d
|
Median salary
$203k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (248 roles · 53 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 248 |
| Open roles in the wider Digital Design & Verification family | 27 | 3283 · 116 employers |
| Median days open | 168 d | 61 d (+107 d vs this employer) |
| Median salary (USD postings) | — | $203k |
Skills observed across this category: DFT implementation, scan chains, memory BIST, JTAG, ATPG, fault coverage
Who's hiring in this category
- AMD · 39 open roles · median 43 d
- NVIDIA · 24 open roles · median 31 d
- Qualcomm · 23 open roles · median 105 d
- NXP Semiconductors · 19 open roles · median 45 d
- Synopsys · 15 open roles · median 28 d
- Intel Corporation · 10 open roles · median 62 d
How we counted: 248 open DFT Engineering (DFT Test) roles from 53 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.