Design Verification - Intern - Petah-Tikva, Israel
Originally posted 30 September 2026 by the employer.
This role focuses on verification for network switches.
About the role
This internship focuses on design verification activities, including definition, architecture, design, and verification of IPs for switching products. You will learn switch architecture, design, and verification development tools and modern methodologies.
What you'll do
- Implement new features in design and verification.
- Write a verification test plan using random techniques and coverage analysis.
- Develop a complex object-oriented random verification environment using System Verilog/UVM.
- Create tests and tune the environment to achieve coverage goals.
- Own and debug failures in simulation to root cause problems.
- Analysis/closure of code and functional coverage.
- Use scripting languages to automate repetitive tasks and improve efficiency.
What you'll need
- Pursuing a BS/MS degree in CS/EE or related technical field(s).
- At least two years before graduation.
- Good understanding of object-oriented programming and digital logic.
- Excellent problem-solving ability.
Skills: SystemVerilog, UVM, test plan, coverage analysis, debug failures
This role has been open 1 day — well below the 63-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1166
|
Median days open
63 d
|
Median salary
$192k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (1166 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 1166 |
| Open roles in the wider Digital Design & Verification family | 31 | 3112 · 115 employers |
| Median days open | 23 d | 63 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $192k |
Skills observed across this category: SystemVerilog, UVM, test plan, coverage analysis, debug failures
Who's hiring in this category
- Qualcomm · 99 open roles · median 55 d
- AMD · 97 open roles · median 41 d
- NVIDIA · 83 open roles · median 70 d
- Synopsys · 63 open roles · median 23 d
- SiFive · 56 open roles · median 54 d
- Micron Technology · 53 open roles · median 113 d
How we counted: 1166 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 1 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.