Design Verification Engineer - Sunnyvale, CA, United States
$190,000 - $230,000 USD yearly
Originally posted 4 June 2026 by the employer.
About the role
This role involves ensuring high-quality design for silicon by working with architects, designers, post-silicon, and software engineers. The work includes contributing to the evolution of verification methodology and best practices.
What you'll do
- Develop and implement verification strategies, detailed tests, and coverage plans based on micro-architecture.
- Create verification methodologies and reusable environments, including stimulus, checkers, assertions, and coverage.
- Implement tests, manage regressions, gather coverage, and debug test failures.
- Collaborate with cross-functional teams including architecture, RTL design, physical design, firmware, and validation.
- Analyze and debug complex issues across simulation, emulation, and silicon bring-up phases.
- Continuously enhance verification infrastructure and flows to improve efficiency and quality.
What you'll need
- Deep knowledge of SystemVerilog testbench, DPI, and UVM.
- Excellent programming skills and knowledge of software engineering practices including object-oriented design.
- Experience developing scalable and portable testbenches and components.
- Experience with verification methodologies and tools such as simulators, waveform viewers, build and run automation, coverage collection, and gate level simulations.
- Proficient in scripting languages such as Python or Perl.
- 3-5+ years of Design Verification experience.
Nice to have
- Knowledge of pipelined processor architecture.
- BS or MS in Computer Science or Electrical Engineering.
Skills: verification strategies, testbench, UVM, SystemVerilog, coverage
This role has been open 84 days — well above the 66-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1201
|
Median days open
66 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cerebras | All employers we track in this specialty (1201 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 1201 |
| Open roles in the wider Digital Design & Verification family | 6 | 3201 · 115 employers |
| Median days open | 84 d | 66 d (+18 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: verification strategies, testbench, UVM, SystemVerilog, coverage
Who's hiring in this category
- Qualcomm · 110 open roles · median 40 d
- AMD · 95 open roles · median 52 d
- NVIDIA · 84 open roles · median 60 d
- Synopsys · 64 open roles · median 34 d
- SiFive · 55 open roles · median 76 d
- Cadence Design Systems · 50 open roles · median 118 d
How we counted: 1201 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.