Originally posted 22 July 2026 by the employer.
About the role
Texas Instruments is seeking a Design Verification Engineer to work on digital and AMS verification of high-performance mixed-signal sensor circuits interfacing with analog circuitry.
What you'll do
- Develop detailed verification and test plans using specifications to cover digital and analog features of mixed-signal chips. - Develop SystemVerilog chip-level testcases and behavioral models for analog blocks, integrating them into the chip-level verification environment. - Perform simulation, testcase debug, and verification closure for digital and analog functionality at chip-level in digital and AMS environments. - Run regressions and drive design verification closure activities while identifying design bugs. - Collaborate with design and systems teams to review specification gaps and design bugs. - Implement design for testability using ad-hoc, Full scan, IDDQ, VBOX, ATPG, and BIST.
What you'll need
- Master's degree in Electrical Engineering or a related field. - 3+ years of related experience. - Hands-on working experience in digital and AMS verification for mixed-signal chips. - Programming skills using SystemVerilog in verification. - Knowledge of SystemVerilog and class-based verification concepts and DV flows.
Nice to have
- Experience writing an exhaustive verification plan from specifications. - Experience with metric-based verification closure using code and functional coverage. - Experience in random/constrained random verification. - Experience with Cadence simulation and debug tools. - Experience with UART, SPI, and I2C communication protocols.
Skills: SystemVerilog, UVM, chip-level verification, AMS environment, design for testability
This role has been open 89 days — well above the 66-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1201
|
Median days open
66 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Texas Instruments | All employers we track in this specialty (1201 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 1201 |
| Open roles in the wider Digital Design & Verification family | 78 | 3224 · 116 employers |
| Median days open | 27 d | 66 d (−39 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: SystemVerilog, UVM, chip-level verification, AMS environment, design for testability
Who's hiring in this category
- Qualcomm · 110 open roles · median 40 d
- AMD · 95 open roles · median 52 d
- NVIDIA · 84 open roles · median 60 d
- Synopsys · 64 open roles · median 34 d
- SiFive · 55 open roles · median 76 d
- Cadence Design Systems · 50 open roles · median 118 d
How we counted: 1201 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 19 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.