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Qualcomm

Design Verification Engineer - NPU- Engineer to Sr. Staff Engineer

Qualcomm Austin, Texas, United States of America, United States 9 days ago
Verification, Validation & Test

$174,400 - $261,600 USD yearly

Originally posted 1 October 2026 by the employer.

About the role

This role is for a Design Verification Engineer focusing on hardware design verification within Qualcomm's Hexagon DSP AI team. The position involves verifying NPU designs.

What you'll do

  • Verify high speed CPU/GPU/DSP designs.
  • Apply random test generation methodologies.
  • Apply problem-solving skills to create solutions.

What you'll need

  • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 5+ years of experience, OR PhD in Science, Engineering, or related field and 4+ years of experience.

Nice to have

  • 3 years of experience in design verification methods.
  • 3 years of experience with programming (e.g., C, C++ , Python), computer architecture, or embedded systems.
  • 3 years of experience with high-performance microprocessor design.
  • Masters or Doctorate - Computer Engineering, Computer Science, Electrical Engineering.

Skills: design verification methods, ASIC design, NPU, programming C/C++, computer architecture

Market context

This role has been open 8 days — well below the 63-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1206
Median days open
63 d
Median salary
$187k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Qualcomm compares in Design Verification hiring
Metric Qualcomm All employers we track in this specialty (1206 roles · 95 employers)
Open roles in this specialty 106 1206
Open roles in the wider Digital Design & Verification family 389 3183 · 114 employers
Median days open 43 d 63 d (−20 d vs this employer)
Median salary (USD postings) — $187k

Skills observed across this category: design verification methods, ASIC design, NPU, programming C/C++, computer architecture

Who's hiring in this category

  • Qualcomm (this employer) · 111 open roles · median 42 d
  • AMD · 102 open roles · median 49 d
  • NVIDIA · 76 open roles · median 62 d
  • Synopsys · 61 open roles · median 25 d
  • SiFive · 55 open roles · median 66 d
  • Micron Technology · 52 open roles · median 98 d

How we counted: 1206 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Austin, Texas, United States of America, United States
On-site
$174,400 - $261,600 USD yearly
9 days ago

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