Design Verification Engineer (eInfochips Inc) - US-CA-San Jose, California, United States
Originally posted 22 October 2026 by the employer.
About the role
Arrow Electronics is seeking a Design Verification Engineer (eInfochips Inc) based on-site in San Jose, California, responsible for architecting verification environments for ASIC SoC designs from verification planning through tapeout.
What you'll do
- Architect verification environments for ASIC SoCs, develop verification plans, and execute verification through tapeout. - Develop complex self-checking testbenches with constraint random stimulus generation, environment assumptions, assertions, and cover properties. - Architect SoC test firmware, create test plan documentation, and develop and debug SoC ASIC platform test firmware and tests in C/C++. - Implement and maintain an integrated end-to-end formal verification flow to meet formal verification objectives. - Develop and modify scripts to automate the verification process and drive regression and coverage closure. - Review functional and technical specification documents and partner in verification methodology development activities.
What you'll need
- Minimum of 8 years of related experience with a 4-year degree, 6 years with an advanced degree, or equivalent experience. - Verification expertise in SystemVerilog (SV) and UVM. - Domain expertise with AXI, NOC, Ethernet, PCIe, or UCIe Switch protocols. - Experience with ARM or RISC-V CPU architectures along with C programming knowledge. - Track record executing regression and coverage closure on multi-million gate ASIC SoC designs. - Ability to work fully on-site in San Jose, California.
Skills: SystemVerilog, UVM, PCIe, UCIe, testbench, formal verification
This role has been open 0 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1233
|
Median days open
64 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Arrow Electronics | All employers we track in this specialty (1233 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 1233 |
| Open roles in the wider Digital Design & Verification family | 11 | 3298 · 115 employers |
| Median days open | 128 d | 64 d (+64 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SystemVerilog, UVM, PCIe, UCIe, testbench, formal verification
Who's hiring in this category
- Qualcomm · 115 open roles · median 41 d
- AMD · 93 open roles · median 51 d
- NVIDIA · 84 open roles · median 62 d
- Synopsys · 66 open roles · median 37 d
- SiFive · 55 open roles · median 79 d
- Cadence Design Systems · 51 open roles · median 121 d
How we counted: 1233 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.