Design Verification Engineer- CPU - Santa Clara, CA, United States
$200,000 - $350,000 USD yearly
Originally posted 19 August 2026 by the employer.
Verify Velaura's custom CPU for our Physical AI SoC.
About the role
This role involves verifying and delivering Velaura's Physical AI SoC, with a specific focus on the custom CPU.
What you'll do
- Own verification of custom CPU units including instruction fetch, decode, load store, and instruction, data and last level caches.
- Work with CPU and SoC architects to translate microarchitecture intent into detailed test and coverage plans.
- Build verification environments using SystemVerilog, UVM, C and C++, with portable stimulus, checkers, assertions, trackers and coverage.
- Develop instruction level stimulus and compare against a golden instruction set simulator.
- Verify memory ordering, coherence, exceptions and privilege behavior against architecture specification.
- Execute regressions and track progress using bug and coverage metrics.
What you'll need
- 8 or more years verifying high performance CPUs or complex digital designs.
- Strong computer architecture and microarchitecture fundamentals.
- Experience with SystemVerilog, UVM, C and C++, assertions and coverage driven verification.
- Experience owning a block or unit of a design independently from test plan through coverage closure.
- Experience writing test plans, portable testbenches and transactors.
- Experience debugging complex issues across hardware and software boundaries.
- BS or higher in Computer Engineering, Electrical Engineering or Computer Science.
Nice to have
- Knowledge of the ARM or RISC-V instruction set architecture.
- Knowledge of microprocessor verification domains such as cache coherence, memory ordering, prefetching, branch prediction, speculative execution and address translation.
- Prior experience verifying front end, fetch, load store, instruction cache, data cache or last level cache units.
- Knowledge of vector units or matrix multiplication units.
- Experience with random instruction sequencing, formal verification, gate level simulation or silicon bring up.
- Experience verifying a custom processor developed from scratch.
- Experience leading a small team of verification engineers.
- Experience using AI assisted verification workflows.
Skills: CPU units, SystemVerilog, UVM, test and coverage plans, microarchitecture
This role has been open 57 days — below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1195
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Velaura AI | All employers we track in this specialty (1195 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 1195 |
| Open roles in the wider Digital Design & Verification family | 17 | 3198 · 115 employers |
| Median days open | 70 d | 64 d (+6 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: CPU units, SystemVerilog, UVM, test and coverage plans, microarchitecture
Who's hiring in this category
- Qualcomm · 109 open roles · median 37 d
- AMD · 97 open roles · median 51 d
- NVIDIA · 84 open roles · median 58 d
- Synopsys · 63 open roles · median 31 d
- SiFive · 55 open roles · median 73 d
- Arm Holdings · 49 open roles · median 101 d
How we counted: 1195 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.