Design Verification Engineer - Austin, United States
Originally posted 1 October 2026 by the employer.
About the role
This role involves ensuring the quality of System-on-Chip (SOC) components, IP, or subsystems through comprehensive verification efforts. The position focuses on verification methodologies for IP such as Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems, hardware security, High-Speed IO standards, power management, fabric infrastructure, memory cache management, Memory Management Unit, and Display Subsystem.
What you'll do
- Review design and architecture specifications and collaborate with design and micro-architecture teams.
- Develop test plans, tests, and coverage plans.
- Communicate and collaborate with design, architecture, and software teams to understand use cases and corner conditions.
- Drive test case development.
What you'll need
- Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
- Experience implementing Computer Architecture to understand micro-architecture.
- Experience utilizing System Verilog/UVM to develop test-bench code and test-sequences.
- Experience using Python or Perl for scripting.
- Experience using NCSIM and Xcelium for waveform debug.
- Experience using C++ for writing CPU code.
- Experience utilizing assertions writing to verify RTL.
- Experience implementing Digital Design knowledge to understand design architecture.
- Experience utilizing functional coverage and code coverage understanding to test coverage holes.
Skills: System Verilog/UVM, test-bench code, test-sequences, waveform debug, functional coverage
This role has been open 8 days — well below the 63-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1206
|
Median days open
63 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (1206 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 1206 |
| Open roles in the wider Digital Design & Verification family | 70 | 3183 · 114 employers |
| Median days open | 20 d | 63 d (−43 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: System Verilog/UVM, test-bench code, test-sequences, waveform debug, functional coverage
Who's hiring in this category
- Qualcomm · 111 open roles · median 42 d
- AMD · 102 open roles · median 49 d
- NVIDIA · 76 open roles · median 62 d
- Synopsys · 61 open roles · median 25 d
- SiFive · 55 open roles · median 66 d
- Micron Technology · 52 open roles · median 98 d
How we counted: 1206 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.