Design Automation Engineer - Neuromorphic Computing - United States
$122,440 - $232,190 USD yearly
Originally posted 1 September 2026 by the employer.
Support the Loihi series of research chips in neuromorphic computing, combining asynchronous design methods with standard EDA tools.
About the role
This role involves developing design automation algorithms and tools for neuromorphic computing chips, specifically supporting Intel's Loihi series, which utilizes event-driven, sparse, and massively parallel neuro-inspired processing. You will help pioneer tool flows and automation methods to bring novel designs from concept to silicon.
What you'll do
- Enhance and maintain Loihi's asynchronous EDA tool flow by implementing design automation algorithms, software tools, utilities, and regression tests.
- Support RTL designers, verification engineers, and physical design engineers by providing automated solutions.
- Enable early software development by setting up a scalable framework mapping silicon designs in simulation and emulation.
- Write custom scripts to manipulate synthesis and physical design tools for low power/high performance custom designs.
What you'll need
- 4+ years of experience in developing and deploying production quality tools, flows, and methods for silicon design.
- 4+ years of experience in developing and maintaining the entire ASIC tool suite, including synthesis, place and route, ATPG, FEV, RV, STA, LVS/DRC.
- 4+ years of experience with scripting languages such as Perl, TCL, Python.
- 2+ years of experience in delivering multiple silicon tape-outs.
Nice to have
- Strong System-Verilog/System-C/Object Oriented Programming background.
- Experience with large scale FPGA platforms like HAPS and/or emulation frameworks like ZeBu.
- 1+ year of experience using AI tools for setting up tool flows, debugging, and improving overall productivity.
Skills: EDA tool flow, design automation, silicon design lifecycle, asynchronous design, synthesis, place and route
This role has been open 46 days — well below the 73-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
672
|
Median days open
73 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (672 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 672 |
| Open roles in the wider Physical Implementation family | 60 | 1440 · 110 employers |
| Median days open | 43 d | 73 d (−30 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: EDA tool flow, design automation, silicon design lifecycle, asynchronous design, synthesis, place and route
Who's hiring in this category
- Cadence Design Systems · 153 open roles · median 170 d
- Synopsys · 63 open roles · median 36 d
- Micron Technology · 44 open roles · median 47 d
- Qualcomm · 36 open roles · median 75 d
- GlobalFoundries · 33 open roles · median 38 d
- Keysight Technologies · 32 open roles · median 72 d
How we counted: 672 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.