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Qualcomm

DDRSS Validation Engineer (RTL + Silicon Debug)

Qualcomm San Diego, California, United States of America, United States 4 months ago
Digital Design & SoC Architecture

$140,000 - $210,000 USD yearly

Originally posted 29 June 2026 by the employer.

Develop embedded C firmware and execute deep RTL debug across emulation and silicon for DDRSS IP.

About the role

This role spans pre-silicon verification, emulation, and post-silicon validation, focusing on deep debug in RTL/Verilog environments and silicon bring-up. You will validate SoC subsystems including DDRSS IP, memory controllers, caches, and interconnects across simulation, emulation, and silicon platforms.

What you'll do

- Drive validation of SoC subsystems including DDR, memory controller, cache, and interconnect across RTL simulation, emulation platforms, and post-silicon environments. - Perform deep debug of functional issues by root-causing failures in RTL simulations, testbenches, firmware-driven flows, and silicon (timing, stability, performance). - Develop and maintain production-quality firmware in C to manage DDRSS IP sequences through init, frequency, and power management. - Validate firmware across RTL simulation environments, emulation systems, and silicon platforms. - Collaborate cross-functionally with RTL architecture, design verification, and system validation teams. - Develop tools, debug infrastructure, and automation to improve validation efficiency, data collection, and failure triage.

What you'll need

- Bachelor's degree in Science, Engineering, or a related field with 4+ years of ASIC design, verification, validation, integration, or related work experience (or Master's with 3+ years, or PhD with 2+ years). - Experience spanning SoC validation, design verification, or post-silicon validation. - Strong debug skills in Verilog and SystemVerilog simulation environments. - Hands-on experience with firmware development in C for embedded systems. - Experience with silicon bring-up, debug, and validation across simulation, emulation, and silicon platforms. - Solid understanding of computer architecture, SoC subsystems, and memory systems (DDR, cache, interconnect).

Market context

This role has been open 113 days — well above the 62-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1070
Median days open
62 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Qualcomm compares in Digital/RTL Design hiring
Metric Qualcomm All employers we track in this specialty (1070 roles · 105 employers)
Open roles in this specialty 153 1070
Open roles in the wider Digital Design & Verification family 407 3283 · 116 employers
Median days open 57 d 62 d (−5 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm (this employer) · 153 open roles · median 58 d
  • Synopsys · 87 open roles · median 35 d
  • AMD · 76 open roles · median 40 d
  • Analog Devices · 49 open roles · median 51 d
  • NXP Semiconductors · 42 open roles · median 90 d
  • NVIDIA · 41 open roles · median 62 d

How we counted: 1070 open Digital/RTL Design (RTL Design) roles from 105 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Diego, California, United States of America, United States
On-site
$140,000 - $210,000 USD yearly
4 months ago

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