Datacenter & Agentic AI Workload Performance Analysis Engineer - Remote
$100,000 - $500,000 USD yearly
Originally posted 1 October 2026 by the employer.
About the role
This role involves shaping the performance of Tenstorrent's RISC-V CPUs across datacenter and agentic AI workloads. Your work will directly influence CPU architecture and performance for cloud, enterprise, and emerging AI workloads.
What you'll do
- Bring real-world applications onto RISC-V platforms.
- Characterize workload behavior and identify CPU performance, efficiency, and scalability opportunities.
- Translate workload analysis insights into architectural improvements.
- Reduce large production workloads for performance modeling.
- Correlate simulation results with hardware behavior.
What you'll need
- PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field with research or industry experience in workload characterization, benchmark development, performance analysis, or simulation.
- Deep understanding of CPU architecture and RISC-V, including pipelines, speculative execution, vector/SIMD extensions, memory hierarchies, and performance tradeoffs.
- Hands-on experience with performance analysis and simulation tools such as Linux perf, strace, QEMU, or CPU microarchitecture simulators.
- Strong programming skills in C/C++, Python, Bash/Shell, and assembly or intrinsic programming.
- Strong understanding of systems software, including operating systems, virtualization, compilers, runtimes, and GNU/RISC-V software ecosystems.
Skills: CPU performance analysis, RISC-V, CPU microarchitecture, workload characterization, hardware/software co-design
This role has been open 8 days — well below the 76-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
461
|
Median days open
76 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (461 roles · 63 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 461 |
| Open roles in the wider Digital Design & Verification family | 30 | 3183 · 114 employers |
| Median days open | 158 d | 76 d (+82 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: CPU performance analysis, RISC-V, CPU microarchitecture, workload characterization, hardware/software co-design
Who's hiring in this category
- Qualcomm · 77 open roles · median 79 d
- NVIDIA · 60 open roles · median 63 d
- AMD · 36 open roles · median 58 d
- Apple · 32 open roles · median 3 d
- Arm Holdings · 27 open roles · median 106 d
- NXP Semiconductors · 21 open roles · median 108 d
How we counted: 461 open SoC/Chip Architecture (SOC Architecture) roles from 63 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.