$231,500 - $341,075 USD yearly
Originally posted 22 September 2026 by the employer.
This role drives analog design automation and engineering productivity across the custom-analog design organization, with a strong emphasis on AI-assisted design flows.
About the role
This role leads analog design automation and productivity initiatives across the custom-analog design organization.
What you'll do
- Define and drive the technical strategy and roadmap for analog design automation and AI-assisted productivity tools.
- Develop, deploy, and maintain automation flows for custom-analog design tasks, from schematic and layout through verification and signoff.
- Identify opportunities to apply AI/ML techniques to analog design problems (e.g., sizing, layout assistance, verification triage) and lead their deployment.
- Own the reuse and hardening strategy for analog IP and automation flows, ensuring methodologies are robust, well-documented, and portable.
- Partner with design, CAD, and methodology teams to roll out automation and AI-assisted capabilities across fabric, SerDes, and IO design groups.
- Establish metrics to track productivity, quality, and adoption of automation and AI-assisted flows, and report progress.
What you'll need
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 12+ years of experience in custom-analog circuit design and/or analog design automation.
- Hands-on experience in design automation and/or AI-assisted methodologies.
- Demonstrated ability to develop and deploy design automation methodology across multiple teams.
- Working knowledge of analog/mixed-signal design flows (schematic capture, layout, extraction, verification).
- Expertise with EDA toolchains such as Cadence Virtuoso Studio, Maestro/ADE, Spectre, Quantus QRC, Voltus-XFi/EMIR, Synopsys HSPICE/PrimeSim, or equivalent.
- Expert-level scripting and automation ability (Cadence SKILL, Python, Tcl, shell) for building and maintaining production automation.
- Demonstrated application of AI/ML to design or verification workflows, moved into production use.
Nice to have
- Prior experience leading a Center of Excellence (CoE) or cross-functional capability team.
- Experience with machine-learning-assisted EDA tools or building custom AI/ML tooling for circuit design tasks.
- Track record of IP reuse and hardening strategies that reduced design cycle time across multiple tapeouts.
Skills: analog design automation, AI-assisted design flows, Cadence Virtuoso, SKILL, PDKs, EDA vendors
This role has been open 19 days — well below the 81-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
690
|
Median days open
81 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (690 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 690 |
| Open roles in the wider Physical Implementation family | 27 | 1475 · 107 employers |
| Median days open | 46 d | 81 d (−35 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: analog design automation, AI-assisted design flows, Cadence Virtuoso, SKILL, PDKs, EDA vendors
Who's hiring in this category
- Cadence Design Systems · 160 open roles · median 169 d
- Synopsys · 61 open roles · median 38 d
- Micron Technology · 42 open roles · median 91 d
- Qualcomm · 42 open roles · median 62 d
- NVIDIA · 41 open roles · median 75 d
- GlobalFoundries · 31 open roles · median 52 d
How we counted: 690 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.