CST Application Engineer Intern - Silicon - San Jose, United States
$59,488 - $110,449 USD yearly
Originally posted 6 October 2026 by the employer.
About the role
This internship involves working with the Customer Success Team (CST) to apply electronic design automation (EDA) tools for silicon design, systems development, and design automation. The program provides hands-on training in applications supporting system and package design, digital and analog IC design and simulation, physical design and analog layout, and advanced verification.
What you'll do
- Gain insight into silicon and systems technologies.
- Learn about global technology company operations.
- Solve complex engineering challenges with technical teams.
- Participate in hands-on training for system and package design.
- Develop skills in digital and analog IC design and simulation.
- Apply artificial intelligence across design disciplines.
What you'll need
- Currently enrolled in a STEM, electrical engineering, or computer engineering program.
- Rising senior pursuing a bachelor’s degree.
- Ability to manage multiple complex assignments.
- Strong communication skills.
- Strong presentation skills.
- Strong assessment and analytical skills.
Nice to have
- Experience with electronic design automation (EDA).
- Experience with foundational silicon, package, or board design.
- Experience with AI use cases.
Skills: electronic design automation (EDA), system and package design, digital and analog IC design, physical design, scripting languages
This role has been open 2 days — well below the 79-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
704
|
Median days open
79 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (704 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 163 | 704 |
| Open roles in the wider Physical Implementation family | 187 | 1488 · 107 employers |
| Median days open | 162 d | 79 d (+83 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: electronic design automation (EDA), system and package design, digital and analog IC design, physical design, scripting languages
Who's hiring in this category
- Cadence Design Systems (this employer) · 163 open roles · median 162 d
- Synopsys · 59 open roles · median 36 d
- Micron Technology · 44 open roles · median 107 d
- Qualcomm · 42 open roles · median 60 d
- NVIDIA · 41 open roles · median 73 d
- GlobalFoundries · 30 open roles · median 51 d
How we counted: 704 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.