CPU Verification Engineer - CO, Ft Collins, United States
Originally posted 31 August 2026 by the employer.
Verify cache subsystems for high-performance processors.
About the role
As a CPU Verification Engineer, you will verify the cache subsystems powering high-performance processors. This involves owning functional verification for L2 and L3 cache designs from block level through full-chip integration.
What you'll do
- Own functional verification of L2 and L3 cache subsystems across block, cluster, and full-chip hierarchies.
- Design and build C++ verification infrastructure including behavioral reference models, scoreboards, and checkers.
- Develop C and assembly test programs to validate cache coherence, replacement policies, and architectural corner cases.
- Drive regression quality and coverage closure to tape-out standards.
- Serve as the technical authority in design reviews and sign-off readiness assessments.
- Mentor peers and elevate team quality through code reviews and technical discussion.
What you'll need
- Expert C++ programming skills.
- Strong understanding of cache architecture and coherence protocols.
- Track record of delivering verification sign-off on high-performance processor designs.
- Experienced in functional verification on high-performance CPU or complex ASIC/SoC designs.
- Proficiency in Python or Perl scripting for test automation and coverage analysis.
- Familiarity with industry-standard RTL simulation and debug tools.
Nice to have
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
Skills: functional verification, cache subsystems, C++ verification infrastructure, test programs, coverage closure, CPU
This role has been open 47 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1202
|
Median days open
65 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1202 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 96 | 1202 |
| Open roles in the wider Digital Design & Verification family | 252 | 3202 · 115 employers |
| Median days open | 51 d | 65 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: functional verification, cache subsystems, C++ verification infrastructure, test programs, coverage closure, CPU
Who's hiring in this category
- Qualcomm · 110 open roles · median 39 d
- AMD (this employer) · 96 open roles · median 51 d
- NVIDIA · 84 open roles · median 59 d
- Synopsys · 64 open roles · median 33 d
- SiFive · 55 open roles · median 75 d
- Cadence Design Systems · 50 open roles · median 117 d
How we counted: 1202 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.