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Qualcomm

CPU Systems RTL Engineer - Santa Clara, California, United States of America

Qualcomm Santa Clara, California, United States of America; Austin, TX, USA; San Diego, CA, USA; Raleigh, NC, United States 5 months ago
Digital Design & SoC Architecture

$167,100 - $250,700 USD yearly

Originally posted 21 May 2026 by the employer.

About the role

Qualcomm is seeking a CPU Systems RTL Engineer to develop and verify high performance and low power CPU designs. The role focuses on designing, verifying, and implementing multi-core CPU operations across Qualcomm business units.

What you'll do

- Leverage computer architecture, micro-architecture, logic design, circuits, and physical design to develop and verify high performance and low power CPU designs. - Anticipate, identify, and solve complex problems to ensure design completeness, functionality, power, and performance. - Collaborate with cross-functional teams to define requirements, specifications, and trade-offs including performance, power, and cost. - Evaluate the complete design flow from architecture definition and feasibility through pre-silicon design, verification, and post-silicon validation. - Write detailed technical documentation including feature descriptions, architectural descriptions, verification test plans, and implementation details.

What you'll need

- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience (or Master's with 3+ years, or PhD with 2+ years). - Experience in digital logic design and micro-architecture definition. - Experience with pre-silicon design and verification flows.

Nice to have

- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. - 6 years of work experience with high-performance microprocessor design. - 6 years of work experience with high level programming (C, C++) and scripting languages (Perl, Python). - 6 years of work experience with simulators and waveform debugging tools (Verilog, VHDL). - 6 years of work experience with industry standard tools for synthesis, place and route, and design verification. - 6 years of work experience with simulation, emulation, formal verification, or silicon validation. - 6 years of experience creating functional models, checkers, test plans, and test generation.

Market context

This role has been open 161 days — well above the 63-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1084
Median days open
63 d
Median salary
$185k
See the full market breakdown ▾Category comparison, and who else is hiring
How Qualcomm compares in Digital/RTL Design hiring
Metric Qualcomm All employers we track in this specialty (1084 roles · 103 employers)
Open roles in this specialty 160 1084
Open roles in the wider Digital Design & Verification family 424 3328 · 115 employers
Median days open 60 d 63 d (−3 d vs this employer)
Median salary (USD postings) — $185k

Who's hiring in this category

  • Qualcomm (this employer) · 160 open roles · median 60 d
  • Synopsys · 87 open roles · median 36 d
  • AMD · 77 open roles · median 42 d
  • Analog Devices · 49 open roles · median 53 d
  • NXP Semiconductors · 42 open roles · median 92 d
  • NVIDIA · 39 open roles · median 64 d

How we counted: 1084 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Santa Clara, California, United States of America; Austin, TX, USA; San Diego, CA, USA; Raleigh, NC, United States
On-site
$167,100 - $250,700 USD yearly
5 months ago

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