CPU RTL Design Manager
Drive the Memory Execution Unit (MEU) Front-End development for Server and Client products.
Originally posted 22 September 2026 by the employer.
About the role
This role involves leading the Memory Execution Unit (MEU) Front-End development team, responsible for delivering CPU microarchitecture solutions. You will own end-to-end execution of the MEU cluster across RTL Design, Design Verification, and Formal Verification.
What you'll do
- Own end-to-end delivery of the MEU cluster across RTL, DV, and Formal Verification functions.
- Drive microarchitecture reviews, implementation strategy, verification closure, and quality signoff.
- Ensure delivery of features meeting Power, Performance, Area (PPA), Quality, Reliability, and Security objectives.
- Define execution strategy, milestones, risk mitigation plans, and resource allocation.
- Drive adoption of advanced methodologies, automation, AI-assisted debug, formal technologies, and verification innovations.
- Partner with Architecture, Design, Validation, Physical Design, DFT, Power, Security, and Product Engineering teams.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of industry experience, or Master's degree with 12+ years of experience.
- 5+ years of engineering management experience leading senior technical teams.
- Strong expertise in CPU microarchitecture, RTL design, verification methodologies, and formal verification.
- Proven experience delivering complex SoC/CPU products from definition through silicon.
- Deep understanding of SystemVerilog, verification methodologies, assertions, coverage-driven verification, and formal tools.
- Demonstrated success leading cross-functional programs and geographically distributed teams.
Nice to have
- Experience leading large Front-End CPU organizations spanning RTL, DV, and Formal Verification.
- Expertise in Out-of-Order CPUs, Memory Subsystems, Cache Coherency, or Execution Units.
- Strong understanding of performance, power, security, and quality tradeoffs.
- Experience driving AI/ML-based validation methodologies and automation initiatives.
Skills: CPU microarchitecture, RTL Design, Design Verification, Formal Verification, SystemVerilog
More semiconductor jobs: Intel Corporation jobs · RTL design jobs · India jobs
This role has been open 44 days — well below the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1086
|
Median days open
61 d
|
Category median salary (all employers)
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Intel Corporation | All employers we track in this specialty (1086 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 37 | 1086 |
| Open roles in the wider Digital Design & Verification family | 112 | 3497 · 120 employers |
| Median days open | 22 d | 61 d (−39 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: CPU microarchitecture, RTL Design, Design Verification, Formal Verification, SystemVerilog
Who's hiring in this category
- Qualcomm · 142 open roles · median 71 d
- Synopsys · 90 open roles · median 48 d
- AMD · 78 open roles · median 47 d
- NXP Semiconductors · 45 open roles · median 104 d
- NVIDIA · 44 open roles · median 61 d
- Analog Devices · 41 open roles · median 51 d
How we counted: 1086 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.