CPU RTL Design Engineer - TX, Austin, United States
Digital Design & SoC Architecture
Originally posted 6 October 2026 by the employer.
About the role
You will contribute to the development of core pipeline logic and microarchitecture features.
What you'll do
- Design and implement RTL for CPU core pipeline components and related logic
- Collaborate with architecture, verification, performance, and physical design teams to deliver optimized designs
- Analyze and improve performance, power, area, and timing characteristics
- Support design verification, synthesis, timing closure, and physical design efforts
- Investigate and resolve pre-silicon and post-silicon issues
What you'll need
- Experience with Verilog/SystemVerilog RTL development in CPU, SoC, ASIC, or comparable digital design environments
- Understanding of modern CPU architecture, including out-of-order processor concepts
- Experience with logic design and high-performance processor pipeline development
- Experience with load/store, decode, execution, scheduling, or other CPU core subsystems
- Knowledge of power-efficient and low-power design techniques, including timing and power optimization
- Familiarity with synthesis, place-and-route, static timing analysis, and timing closure
- Exposure to multiple stages of the product development lifecycle, including architecture, implementation, verification, or post-silicon debug
Nice to have
- Experience debugging and optimizing designs in collaboration with performance and verification teams
- Familiarity with physical design
- Familiarity with scripting such as Python or Tcl
- Familiarity with concepts such as DFT, clocking, reset, and power management
- Relevant experience in processor, accelerator, SoC, or other complex digital design environments
Market context
This role has been open 2 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1010
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1010 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 73 | 1010 |
| Open roles in the wider Digital Design & Verification family | 265 | 3175 · 113 employers |
| Median days open | 35 d | 62 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 143 open roles · median 60 d
- Synopsys · 82 open roles · median 24 d
- AMD (this employer) · 73 open roles · median 35 d
- Analog Devices · 48 open roles · median 40 d
- NXP Semiconductors · 48 open roles · median 77 d
- NVIDIA · 45 open roles · median 63 d
How we counted: 1010 open Digital/RTL Design (RTL Design) roles from 97 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.