CPU Power and Thermal Management Architect - Santa Clara, California, United States of America
$198,700 - $298,100 USD yearly
Originally posted 14 May 2026 by the employer.
About the role
This role focuses on CPU power management architecture, covering boot architecture, idle power management, active power management, clock management, and limit management for high-performance devices. The focus includes developing server-class solutions optimized for server products.
What you'll do
- Work with chip architects to understand architecture concepts and high-level system requirements. - Take on a leadership role in developing the micro-architecture and design of a high-performance CPU system. - Develop high-level architecture and micro-architecture specifications that translate to RTL design. - Collaborate with hardware, software, and firmware architects to develop an end-to-end CPU system architecture. - Explore high-performance strategies working with the CPU modeling team. - Collaborate with software, firmware, and platform teams to integrate CPU system features into products and prepare clear technical documentation for stakeholders.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 6+ years of relevant experience (or Master's with 5+ years, or PhD with 4+ years). - Deep knowledge of microprocessor architecture, including boot architecture, idle power management (clock gating, power gating, ACPI, PSCI), or active power management (dynamic voltage and frequency scaling, voltage margins, Vmin reduction). - Experience with limit and thermal management, including over-current, power, and thermal limits alongside hardware and software control loops. - Solid understanding of logic design principles, including timing and power implications. - Experience with software and firmware control loops for system-level solutions.
Nice to have
- Master's degree in Computer or Electrical Engineering with 15 years of CPU and SoC architecture or similar experience. - Understanding of CPU, cluster architecture, and SoC architecture. - Understanding of high-performance and low-power micro-architecture techniques and trade-offs in CPU microarchitecture.
This role has been open 161 days — well above the 51-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · AI ML Hardware
|
Open roles in category
1017
|
Median days open
51 d
|
Median salary
$154k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1017 roles · 102 employers) |
|---|---|---|
| Open roles in this specialty | 36 | 1017 |
| Open roles in the wider Software, Firmware & Systems family | 739 | 6277 · 144 employers |
| Median days open | 54 d | 51 d (+3 d vs this employer) |
| Median salary (USD postings) | — | $154k |
Who's hiring in this category
- Intel Corporation · 75 open roles · median 36 d
- KLA Corporation · 63 open roles · median 50 d
- Teradyne · 61 open roles · median 36 d
- NVIDIA · 51 open roles · median 68 d
- Applied Materials · 48 open roles · median 67 d
- AMD · 43 open roles · median 53 d
How we counted: 1017 open Hardware Systems Engineering (AI ML Hardware) roles from 102 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.