CPU Physical Design Engineer, San Diego
$122,500 - $183,700 USD yearly
Originally posted 17 June 2026 by the employer. Relisted by the employer on 5 August 2026.
About the role
As a CPU Physical Design Engineer, you will work with microarchitecture and RTL design teams to implement designs meeting power, area, and performance goals using industry-standard tools and flows. You will support multi-core CPU physical implementation efforts across pipeline optimization and full flow execution from RTL to GDS.
What you'll do
- Collaborate with the CPU microarchitecture team to evaluate specifications and design trade-offs in pipeline and structure sizing.
- Conduct feasibility studies to validate implementability, area, timing, and power metrics.
- Synthesize Verilog RTL into gate-level netlists and execute design optimizations.
- Perform place and route on designs using industry-standard tools and deliver final GDS.
- Optimize the implementation from RTL to GDS to achieve timing, power, and area targets.
- Validate designs for functional and electrical robustness.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of hardware engineering, electrical engineering, or related experience; OR a Master's degree with 1+ year of experience; OR a PhD.
- Hands-on experience with Verilog RTL synthesis into gate-level designs.
- Practical experience executing place and route workflows to deliver GDS.
- Experience evaluating design feasibilities across area, timing, and power constraints.
Nice to have
- Knowledge of CPU microarchitecture, logic design, and circuits.
- Experience in deep submicron process technology nodes.
- Knowledge of library cells and optimization strategies.
- Solid understanding of industry-standard tools for synthesis, place & route, and tapeout flows.
- Experience with signoff timing and power analysis.
- Knowledge of high-performance and low-power implementation methods.
Skills: synthesis, place & route, GDS, timing, power, area
This role has been open 126 days — well above the 63-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
673
|
Median days open
63 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (673 roles · 79 employers) |
|---|---|---|
| Open roles in this specialty | 122 | 673 |
| Open roles in the wider Physical Implementation family | 167 | 1487 · 110 employers |
| Median days open | 45 d | 63 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: synthesis, place & route, GDS, timing, power, area
Who's hiring in this category
- Qualcomm (this employer) · 122 open roles · median 46 d
- AMD · 63 open roles · median 27 d
- Intel Corporation · 40 open roles · median 15 d
- NVIDIA · 38 open roles · median 68 d
- Synopsys · 37 open roles · median 37 d
- Broadcom · 34 open roles · median 102 d
How we counted: 673 open Physical Design (Physical Design) roles from 79 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.