Compute Interconnect IP Planner (Product Manager) - San Jose, California, United States
$149,100 - $215,925 USD yearly
Originally posted 31 July 2026 by the employer.
Focus on Compute Interconnect IP such as PCIe, CXL, UALink, CHI, and DMA for FPGA semiconductor devices.
About the role
This Planner / Product Manager position is focused on Compute Interconnect such as PCI Express (PCIe), Compute Express Link (CXL), Ultra Accelerator Link (UALink), Coherent Hub Interface (CHI), along with Direct Memory Access (DMA) IP for FPGA semiconductor devices.
What you'll do
- Drive the definition, trade-off analysis, and convergence of hard and soft IP solutions for various FPGA end markets and applications. - Coordinate with business stakeholders and customers to drive market requirements into the product definition and solutions roadmap. - Generate specific product requirements. - Maintain and communicate a detailed IP product roadmap. - Coordinate with peers to align interdependent programs and solutions. - Manage and track input to engineering execution and change management processes.
What you'll need
- Bachelor’s degree or equivalent in Electrical Engineering, Computer Science, Computer Engineering, or other related field of study. - 10+ years of experience in FPGA applications, IP, or related server, storage, data center, and/or acceleration domains. - Expertise in Compute Interconnect IP such as PCIe, CXL, UALink, CHI, or DMA.
Nice to have
- Technical depth and understanding of semiconductor IP solutions for FPGA or ASIC. - Technical depth and understanding of FPGA development tool flows and solutions. - Direct experience in architecting FPGA-based solutions for an end market/application. - Industry knowledge of dynamics, trends, success factors, and competitive forces in FPGA end markets/applications. - Experience in a customer-facing and engagement role. - Relevant product planning/management or technical marketing experience.
Skills: PCIe, CXL, DMA, FPGA IP, product roadmap, market requirements
This role has been open 79 days — well above the 41-day median for Product Management roles.
Product Management · SOC Architecture
|
Open roles in category
40
|
Median days open
41 d
|
Median salary
$231k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Altera | All employers we track in this specialty (40 roles · 16 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 40 |
| Median days open | 79 d | 41 d (+38 d vs this employer) |
| Median salary (USD postings) | — | $231k |
Skills observed across this category: PCIe, CXL, DMA, FPGA IP, product roadmap, market requirements
Who's hiring in this category
- Qualcomm · 9 open roles · median 47 d
- AMD · 7 open roles · median 22 d
- GlobalFoundries · 5 open roles · median 23 d
- NVIDIA · 5 open roles · median 2 d
- Intel Corporation · 2 open roles · median 40 d
- NXP Semiconductors · 2 open roles · median 81 d
How we counted: 40 open Product Management (SOC Architecture) roles from 16 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.