$131,200 - $196,800 USD yearly
Originally posted 27 October 2026 by the employer.
Target the Reconfigurable Dataflow Unit (RDU) through custom IR, model lowering, and tensor tiling.
About the role
As a new grad Compiler Engineer, you will work on core areas of the compiler including intermediate representation (IR) and pass infrastructure, model lowering, partitioning, tensor tiling, memory management, and mapping operations onto the fabric. You will write production code in C++ and Python while targeting the Reconfigurable Dataflow Unit (RDU) architecture.
What you'll do
- Implement and optimize passes in the compiler's IR and pass infrastructure. - Lower and partition machine learning models for execution on the RDU. - Develop tensor tiling and memory management for on-chip memory. - Map operations onto the RDU fabric to improve model performance. - Debug compiler and performance issues at a low level in C++ and Python.
What you'll need
- B.S. in Computer Science, Electrical Engineering, Computer Engineering, or related field. - Experience in machine learning systems development, including ML compilers, LLM inference kernels, or kernel generation. - Strong programming skills in Python and C/C++. - Experience programming GPUs or other AI accelerators.
Nice to have
- M.S. or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or related field. - Experience with ML compiler frameworks such as MLIR or StableHLO. - Experience with LLM kernel libraries. - Machine learning systems research experience. - Open source project ownership or contributions. - Experience building AI agent driven tools or automation.
Skills: compiler, C++, Python, MLIR, RDU, tensor tiling
This role has been open 0 days — well below the 67-day median for Infrastructure/Platform Software roles.
Infrastructure/Platform Software · AI ML Hardware
|
Open roles in category
106
|
Median days open
67 d
|
Median salary
$216k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SambaNova | All employers we track in this specialty (106 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 106 |
| Open roles in the wider Software, Firmware & Systems family | 31 | 6292 · 146 employers |
| Median days open | 27 d | 67 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $216k |
Skills observed across this category: compiler, C++, Python, MLIR, RDU, tensor tiling
Who's hiring in this category
- Qualcomm · 25 open roles · median 57 d
- NVIDIA · 18 open roles · median 63 d
- Graphcore · 8 open roles · median 123 d
- AMD · 6 open roles · median 46 d
- Intel Corporation · 6 open roles · median 18 d
- Micron Technology · 6 open roles · median 50 d
How we counted: 106 open Infrastructure/Platform Software (AI ML Hardware) roles from 28 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.