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AMD

Chip Lead - CA, Santa Clara, United States

AMD US, CA, Santa Clara, United States Full-time 1 day ago
Digital Design & SoC Architecture

Originally posted 27 October 2026 by the employer.

About the role

This role leads and contributes to chip development across the full lifecycle from architecture through production. You will partner with cross-functional engineering teams across architecture, design, validation, and production ramp.

What you'll do

- Lead and contribute to chip development from architecture through production, providing technical leadership across multiple lifecycle phases. - Drive technical decisions, resolve complex engineering challenges, and align stakeholders across technical boundaries. - Partner with chip leads and program managers on execution, planning, dependencies, and risk mitigation. - Collaborate across architecture, RTL, verification, physical design, validation, software, packaging, and manufacturing teams. - Interface with customers, foundries, IP vendors, and EDA partners as needed while improving design methodologies and engineering processes.

What you'll need

- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. - Strong ASIC/SoC development experience across multiple areas including architecture, RTL, verification, physical design, power, packaging, silicon validation, manufacturing, or production ramp. - Deep expertise in one or more semiconductor disciplines with broad knowledge of the end-to-end chip development lifecycle. - Strong understanding of SoC architecture, RTL design and synthesis, verification, timing closure, power optimization, DFT, silicon bring-up, and manufacturing processes. - Proficiency with Verilog, VHDL, and/or SystemVerilog. - Experience with industry-standard ASIC design methodologies and EDA tools.

Nice to have

- Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. - Experience with advanced process nodes, including 7nm and below. - Exposure to CPU, GPU, FPGA, AI/ML accelerators, and/or networking devices. - Previous technical leadership or mentoring experience.

Skills: chip lead, ASIC, SoC architecture, RTL, physical design, silicon bring-up

Market context

This role has been open 0 days — well below the 81-day median for SoC/Chip Architecture roles.

SoC/Chip Architecture · SOC Architecture

Open roles in category
486
Median days open
81 d
Median salary
$239k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in SoC/Chip Architecture hiring
Metric AMD All employers we track in this specialty (486 roles · 68 employers)
Open roles in this specialty 40 486
Open roles in the wider Digital Design & Verification family 259 3359 · 116 employers
Median days open 60 d 81 d (−21 d vs this employer)
Median salary (USD postings) — $239k

Skills observed across this category: chip lead, ASIC, SoC architecture, RTL, physical design, silicon bring-up

Who's hiring in this category

  • Qualcomm · 83 open roles · median 81 d
  • NVIDIA · 54 open roles · median 69 d
  • Apple · 44 open roles · median 18 d
  • AMD (this employer) · 36 open roles · median 76 d
  • Arm Holdings · 27 open roles · median 124 d
  • Micron Technology · 21 open roles · median 103 d

How we counted: 486 open SoC/Chip Architecture (SOC Architecture) roles from 68 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
Full-time
1 day ago

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