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Qualcomm

Camera Power Engineer

Qualcomm San Diego, California, United States of America, United States 2 months ago
Digital Design & SoC Architecture

$99,400 - $149,200 USD yearly

Originally posted 12 August 2026 by the employer.

Join the Multimedia Power team focused on Camera, Video Encoding/Decoding, and Computer Vision.

About the role

This role involves the analysis, budgeting, and optimization of power consumption across multimedia use cases, focusing on Camera, Video Encoding/Decoding, and Computer Vision.

What you'll do

  • Establish hardware core-level power targets and drive power optimization strategies.
  • Utilize power estimation and optimization tools like Synopsys PrimePower, Ansys Power Artist, and Siemens PowerPro.
  • Validate power estimates by correlating with actual silicon measurements.
  • Leverage deep learning and machine learning for power consumption analysis and prediction.
  • Provide ongoing support for multimedia core power optimization and estimation from pre-RTL to post-silicon validation.
  • Collaborate with System Architects, Design Engineers, and Verification teams to refine multimedia use cases for power analysis.

What you'll need

  • Bachelor's or Master's degree in Electrical Engineering.
  • Extensive experience with low power design techniques, including setting power targets, pre-silicon power estimation, and post-silicon power measurement/validation.
  • Deep understanding of Synopsys PrimePower, Ansys Power Artist, and Siemens PowerPro.
  • Solid grasp of synthesis and physical design processes related to power optimization.
  • Knowledge of multimedia intellectual properties (IPs), including camera systems, video codecs, and computer vision technologies.
  • Familiarity with SoC architectures and system-level design principles.

Skills: power optimization, power estimation, Synopsys PrimePower, silicon validation, SoC architecture, low power design

Market context

This role has been open 65 days — slightly above the 61-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1024
Median days open
61 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Qualcomm compares in Digital/RTL Design hiring
Metric Qualcomm All employers we track in this specialty (1024 roles · 103 employers)
Open roles in this specialty 140 1024
Open roles in the wider Digital Design & Verification family 381 3202 · 115 employers
Median days open 63 d 61 d (+2 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: power optimization, power estimation, Synopsys PrimePower, silicon validation, SoC architecture, low power design

Who's hiring in this category

  • Qualcomm (this employer) · 140 open roles · median 63 d
  • Synopsys · 86 open roles · median 31 d
  • AMD · 71 open roles · median 37 d
  • Analog Devices · 47 open roles · median 49 d
  • NVIDIA · 44 open roles · median 59 d
  • NXP Semiconductors · 42 open roles · median 85 d

How we counted: 1024 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Diego, California, United States of America, United States
On-site
$99,400 - $149,200 USD yearly
2 months ago

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