Camera DV Engineer
$148,300 - $222,500 USD yearly
Originally posted 24 August 2026 by the employer.
Work on human and computer vision technologies in the Mobile, Automotive, XR, IoT & Compute space.
About the role
As a Camera DV Engineer, you will engage in verification activities for camera systems, ensuring functional and performance requirements are met.
What you'll do
- Engage in technical discussions across Design/Software/Firmware teams to review / influence optimal imaging solutions and data flows.
- Implement test benches to adapt to new requirements by extensively applying object-oriented concepts & UVM methodology.
- Write parameterized & scalable verification plans.
- Write complex constraints and sequences to create corner case Algorithm and pipeline tuning scenarios.
- Verify functionality and Use-Case Power / Performance KPI's are met.
- Use Simulation/Formal/Assertion/Emulation flows to close on Functional and Code coverages.
- Debug complex issues across multiple verification platforms.
What you'll need
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
- Experience with design verification defining test plans, developing verification infrastructure using OOP and execution of defined test plans to meet required Metrics of Closure.
- Expertise with Hardware verification languages (HVL) such as System Verilog testbench (OVM/UVM).
- Development of Directed and Constrained Random stimulus.
- Strong Digital Design concepts and debugging skills with expertise in traversing Verilog/System-Verilog RTL.
Skills: UVM, System Verilog, test plans, test benches, functional verification
This role has been open 52 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1192
|
Median days open
65 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1192 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 109 | 1192 |
| Open roles in the wider Digital Design & Verification family | 380 | 3183 · 115 employers |
| Median days open | 36 d | 65 d (−29 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: UVM, System Verilog, test plans, test benches, functional verification
Who's hiring in this category
- Qualcomm (this employer) · 106 open roles · median 42 d
- AMD · 99 open roles · median 55 d
- NVIDIA · 82 open roles · median 57 d
- Synopsys · 63 open roles · median 30 d
- SiFive · 54 open roles · median 72 d
- Cadence Design Systems · 50 open roles · median 114 d
How we counted: 1192 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.