C++ Software Engineer, Infrastructure Tools - New College Grad 2027 - CA, Santa Clara, United States
$108,000 - $195,500 USD yearly
Originally posted 9 October 2026 by the employer.
About the role
This role involves the development and management of tooling and release infrastructure for chip designers, ensuring reliability and scalability while adapting to new design architectures.
What you'll do
- Research, develop, and maintain high-quality tooling for scalable build/regression/release infrastructure.
- Develop user-facing services to schedule, track, and triage flows.
- Develop internal tools to collect, analyze, monitor, and visualize key metrics of build and deployment systems.
- Research and adapt CI/CD practices to evolve tools and meet industry standards.
What you'll need
- Bachelor's degree or higher in Computer Science or Computer Engineering (or equivalent experience).
- Experience in a compiled language (C++/Golang) and scripting (Python/Perl/Tcl).
- Experience in writing production quality code.
- Solid understanding of data structure, algorithms, computer architecture, and computer science theory.
Skills: tooling, release infrastructure, chip designers, CI/CD, C++/Python
This role has been open 1 day — well below the 81-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
690
|
Median days open
81 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (690 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 690 |
| Open roles in the wider Physical Implementation family | 89 | 1475 · 107 employers |
| Median days open | 75 d | 81 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: tooling, release infrastructure, chip designers, CI/CD, C++/Python
Who's hiring in this category
- Cadence Design Systems · 160 open roles · median 169 d
- Synopsys · 61 open roles · median 38 d
- Micron Technology · 42 open roles · median 91 d
- Qualcomm · 42 open roles · median 62 d
- NVIDIA (this employer) · 41 open roles · median 75 d
- GlobalFoundries · 31 open roles · median 52 d
How we counted: 690 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.