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MatX

Bluespec Design Engineer (Haskell) - Mountain View, CA, United States

MatX Remote friendly (Mountain View, CA, United States) 7 months ago
Digital Design & SoC Architecture

$175,000 - $450,000 USD yearly

Originally posted 1 April 2026 by the employer.

About the role

MatX is seeking engineers to deliver performant silicon RTL at the full-chip or subsystem level using Bluespec.

What you'll do

- Build production hardware for compute, memory management, and high-speed connectivity - Develop reusable, parameterized Bluespec libraries that scale across the chip - Shape hardware architecture by leveraging Bluespec to explore implementation tradeoffs and converge on designs - Create tooling for the hardware/software ecosystem to support building correct, high-performance hardware

What you'll need

- Proficiency in Haskell, including familiarity with monads, typeclasses, higher-order functions, and do-notation - Strong willingness to ramp up on Bluespec Haskell (BH) - Engineering fundamentals in writing clean, well-tested, well-documented code, along with familiarity with build systems, version control, and CI workflows - Authorization to work in the United States and ability to work on-site in Mountain View Tuesdays through Thursdays

Nice to have

- Existing experience with Bluespec - Prior hardware design experience in ASIC or FPGA, including knowledge of clock domains, pipelining, state machines, synthesis, and timing closure - Production Rust experience

Skills: Bluespec, hardware architecture, compute, memory management, high-speed connectivity, hardware design

Market context

This role has been open 207 days — well above the 65-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1077
Median days open
65 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How MatX compares in Digital/RTL Design hiring
Metric MatX All employers we track in this specialty (1077 roles · 103 employers)
Open roles in this specialty 8 1077
Open roles in the wider Digital Design & Verification family 30 3310 · 115 employers
Median days open 65 d 65 d (same as this employer)
Median salary (USD postings) — $185k

Skills observed across this category: Bluespec, hardware architecture, compute, memory management, high-speed connectivity, hardware design

Who's hiring in this category

  • Qualcomm · 158 open roles · median 62 d
  • Synopsys · 87 open roles · median 38 d
  • AMD · 77 open roles · median 44 d
  • Analog Devices · 49 open roles · median 55 d
  • NXP Semiconductors · 42 open roles · median 94 d
  • NVIDIA · 36 open roles · median 51 d

How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Mountain View, CA, United States
Hybrid
$175,000 - $450,000 USD yearly
7 months ago

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