Assembly Design Kit (ADK) Engineer - San Jose, CA, United States
SK Hynix America
San Jose, CA, United States
8 days ago
Physical Design & EDA
$105,000 USD yearly
Originally posted 2 October 2026 by the employer.
This role involves developing robust design rules and verification flows for 2.5D/3D Interposer and Heterogeneous Integration technologies.
About the role
What you'll do
- Lead the creation and maintenance of comprehensive Assembly Design Kits (ADK) for advanced packaging technologies.
- Define, debug, and validate Design Rules (DRC) and Layout vs. Schematic (LVS) checks for package-specific constraints.
- Partner with package design, process integration, and manufacturing teams to ensure design rule accuracy.
- Provide expert support to design teams in resolving physical verification issues arising from die-to-package integration.
- Develop and automate verification flows using scripting, integrating tools from Synopsys, Cadence, and Siemens EDA.
- Optimize the end-to-end package design flow, identifying bottlenecks and implementing best practices.
What you'll need
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- Minimum 3+ years of hands-on experience in Physical Design, CAD, or PDK/ADK development within the semiconductor or packaging industry.
- Extensive experience with industry-standard sign-off tools from Synopsys (IC Validator, 3DICC), Cadence (PVS, Virtuoso, Integrity 3D-IC), and Siemens EDA (Calibre).
- Deep knowledge of design rule structures, verification methodologies, and GDSII/OASIS data formats.
Nice to have
- Proven track record in managing physical design flows from concept to GDSII/OASIS sign-off.
- Proficiency in Tcl, Perl, Python, or SKILL for flow automation.
- Knowledge of semiconductor manufacturing processes (Reflow, Molding, Bonding or Front-end FEOL/BEOL processes) and their impact on design rule margins.
Market context
This role has been open 6 days — well below the 79-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
704
|
Median days open
79 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | SK Hynix America | All employers we track in this specialty (704 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 704 |
| Open roles in the wider Physical Implementation family | 1 | 1485 · 107 employers |
| Median days open | 6 d | 79 d (−73 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Who's hiring in this category
- Cadence Design Systems · 163 open roles · median 162 d
- Synopsys · 59 open roles · median 36 d
- Micron Technology · 44 open roles · median 107 d
- Qualcomm · 42 open roles · median 60 d
- NVIDIA · 41 open roles · median 73 d
- GlobalFoundries · 30 open roles · median 51 d
How we counted: 704 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.
SK Hynix America
San Jose, CA, United States
On-site
$105,000 USD yearly
8 days ago