ASICS Engineer-Senior to Staff
$121,800 - $182,600 USD yearly
Originally posted 7 October 2026 by the employer.
About the role
This role involves defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development. This work supports high performance, high quality, low power products.
What you'll do
- Apply ASIC knowledge to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development.
- Create architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
- Collaborate with cross-functional teams to develop and execute an implementation strategy that meets system requirements.
- Evaluate all aspects of process flow from high-level design to synthesis, place and route, timing and power use, and verification.
- Utilize tools/applications like RTL to GDS Flow and Virtuoso to execute and enable architecture and design of individual block/SoC or IC Package.
- Write detailed technical documentation for EDA/IP/ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience; OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience; OR PhD in Science, Engineering, or related field.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- 3 years of ASIC design, verification, validation, integration, or related work experience.
- 2 years of experience with architecture and design tools.
- 2 years of experience with scripting tools and programming languages.
- 2 years of experience with design verification methods.
Skills: ASIC design, digital and/or analog, IP development, RTL to GDS Flow, circuit specifications, logic designs
This role has been open 1 day — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1010
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1010 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 139 | 1010 |
| Open roles in the wider Digital Design & Verification family | 389 | 3180 · 113 employers |
| Median days open | 59 d | 62 d (−3 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: ASIC design, digital and/or analog, IP development, RTL to GDS Flow, circuit specifications, logic designs
Who's hiring in this category
- Qualcomm (this employer) · 143 open roles · median 60 d
- Synopsys · 82 open roles · median 24 d
- AMD · 73 open roles · median 35 d
- Analog Devices · 48 open roles · median 40 d
- NXP Semiconductors · 48 open roles · median 77 d
- NVIDIA · 45 open roles · median 63 d
How we counted: 1010 open Digital/RTL Design (RTL Design) roles from 97 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.