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Apple

ASIC Power Engineer - San Diego, United States

Apple San Diego, United States 1 hour ago
Digital Design & SoC Architecture

Originally posted 27 October 2026 by the employer.

About the role

As an ASIC Power Engineer in the wireless SOC organization, you will focus on low-power architecture, power modeling, and silicon correlation efforts. This role involves power modeling, analysis, and silicon validation tasks for wireless communication SoCs.

What you'll do

- Execute low-power architecture definition, power modeling, and power correlation efforts. - Conduct power modeling and detailed power analysis across wireless communication SoCs. - Perform silicon validation tasks for wireless communication SoC designs.

What you'll need

- BS degree and a minimum of 10 years of relevant industry experience. - Demonstrated ASIC power knowledge and understanding of ASIC logic design. - Hands-on experience with power tools such as PTPX and Power Artist. - Knowledge of low power design and UPF. - Proficiency in scripting languages including Shell, Perl, or Python. - Knowledge of common SoC components such as CPU, fabric, peripherals, and PCIe.

Nice to have

- Pre-silicon power estimation experience. - Pre-silicon power modeling experience. - Wireless domain knowledge, including Wi-Fi, BT, and UWB. - System architecture experience. - Post-silicon power correlation experience.

Skills: low power architecture, power modeling, PTPX, Power Artist, UPF

Apple

Apple

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San Diego, United States
On-site
1 hour ago

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