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Broadcom

ASIC Implementation Engineer

Broadcom USA-CA San Jose Innovation Drive, United States Full-time 5 months ago
Physical Design & EDA

$143,800 - $230,000 USD yearly

Originally posted 22 June 2026 by the employer. Relisted by the employer on 11 November 2026.

About the role

Broadcom is searching for a Physical Design Engineer to join the ASIC Products Division to execute physical design from netlist to silicon tape-out on AI designs.

What you'll do

  • Execute physical design, physical verification, and timing closure through various strategies, including top-level STA.
  • Perform place and route, EM/IR analysis, and flow and methodology development.
  • Implement floorplanning and layout, with a focus on top-level floorplanning.
  • Execute clock tree synthesis using custom clock trees, insertion reduction, and skew balancing techniques.
  • Collaborate with IC design RTL engineers on implementation requirements.

What you'll need

  • Bachelor’s degree in Electrical Engineering or Electronics Engineering.
  • 12+ years of relevant physical design experience.
  • Full physical design cycle experience from RTL to tape-out.
  • Proficiency in related EDA tools.
  • Scripting proficiency in TCL and PERL.
  • On-site availability at the San Jose location.

Skills: floorplanning, chip integration, clock tree, DRC/LVS, advanced nodes

More semiconductor jobs: Broadcom jobs · Physical design jobs

Market context

First seen in our index 142 days ago, well above the 62-day median for Physical Design roles.

Physical Design · Physical Design

Open roles in category
713
Median days since first seen
62 d
Category median salary (all employers)
$187k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Broadcom compares in Physical Design hiring
Metric Broadcom All employers we track in this specialty (713 roles · 87 employers)
Open roles in this specialty 48 713
Open roles in the wider Physical Implementation family 53 1630 · 118 employers
Median days since first seen 33 d 62 d (+29 d vs this employer)
Median salary (USD postings) n/a $187k

Skills observed across this category: floorplanning, chip integration, clock tree, DRC/LVS, advanced nodes

Who's hiring in this category

  • Qualcomm · 106 open roles · median 61 d
  • AMD · 64 open roles · median 42 d
  • Broadcom (this employer) · 46 open roles · median 33 d
  • NVIDIA · 46 open roles · median 82 d
  • Synopsys · 43 open roles · median 41 d
  • Intel Corporation · 31 open roles · median 33 d

How we counted: 713 open Physical Design (Physical Design) roles from 87 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.

Apply now
USA-CA San Jose Innovation Drive, United States
On-site
Full-time
$143,800 - $230,000 USD yearly
5 months ago

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