ASIC Digital Design, Sr. Staff Engineer (HPC IP) - 18385
Originally posted 19 October 2026 by the employer.
About the role
This role involves leading the design and verification of complex ASIC blocks and systems for high-performance computing interface IP. The work focuses on interface IP protocols such as PCIe, CXL, DDR memory interfaces, and Ethernet.
What you'll do
- Lead the design and verification of complex ASIC blocks and systems to meet specifications and performance targets.
- Collaborate with analog design, physical design, and applications engineering teams to ensure seamless integration of design components.
- Develop and execute comprehensive test plans to verify design functionality and performance.
- Utilize advanced EDA tools and methodologies to optimize performance and power efficiency.
- Mentor and guide junior engineers within the engineering team.
What you'll need
- BSEE or MSEE with 8+ years of experience in ASIC digital design and verification, including hands-on RTL design experience.
- Proficiency in using industry-standard EDA tools and methodologies for design and verification.
- Deep understanding of high-performance interface IP protocols, including PCI Express (PCIe), Compute Express Link (CXL), DDR memory interfaces, and Ethernet, along with their implementation in ASIC designs.
- Strong analytical and problem-solving skills to address complex ASIC design challenges.
- Strong communication and cross-functional collaboration skills.
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1051
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (1051 roles · 105 employers) |
|---|---|---|
| Open roles in this specialty | 87 | 1051 |
| Open roles in the wider Digital Design & Verification family | 175 | 3283 · 116 employers |
| Median days open | 35 d | 62 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 150 open roles · median 57 d
- Synopsys (this employer) · 84 open roles · median 35 d
- AMD · 72 open roles · median 42 d
- Analog Devices · 49 open roles · median 53 d
- NXP Semiconductors · 42 open roles · median 89 d
- NVIDIA · 40 open roles · median 62 d
How we counted: 1051 open Digital/RTL Design (RTL Design) roles from 105 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.