ASIC Digital Design Engineer-Principal-18710
Originally posted 1 November 2026 by the employer.
About the role
This role involves defining and executing digital architecture and design for high-speed protocols including DDR, PCIe/CXL, UAL, and UCIe. You will lead ASIC RTL design and verification at both chip and block levels.
What you'll do
- Define and develop ASIC RTL design and verification at both chip and block levels.
- Create and execute design plans for complex digital designs, focusing on DDR, PCIe, CXL, UAL, and UCIe IO protocols.
- Collaborate with cross-functional teams to ensure seamless integration and functionality of designs.
- Utilize advanced design and verification methodologies and tools to achieve high-quality results.
- Mentor and guide junior engineers, promoting best practices across the team.
- Communicate with internal and external stakeholders to align on project goals and deliverables.
What you'll need
- BSEE or BSCE with 12+ years of industry experience, or an advanced degree with 10+ years of industry experience.
- Extensive experience in ASIC RTL design.
- In-depth knowledge of DDR, PCIe, UAL, UCIe, and similar IO protocols and their applications.
- Proficiency in advanced digital design tools and methodologies.
- Proven ability to work independently and solve complex technical problems.
- Strong communication skills for cross-functional technical alignment.
More semiconductor jobs: Synopsys jobs · RTL design jobs · Austin jobs
First seen in our index 0 days ago, well below the 65-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1098
|
Median days since first seen
65 d
|
Category median salary (all employers)
$188k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (1098 roles · 104 employers) |
|---|---|---|
| Open roles in this specialty | 89 | 1098 |
| Open roles in the wider Digital Design & Verification family | 188 | 3533 · 119 employers |
| Median days since first seen | 54 d | 65 d (+11 d vs this employer) |
| Median salary (USD postings) | n/a | $188k |
Who's hiring in this category
- Qualcomm · 142 open roles · median 74 d
- AMD · 92 open roles · median 55 d
- Synopsys (this employer) · 89 open roles · median 54 d
- NVIDIA · 48 open roles · median 67 d
- NXP Semiconductors · 45 open roles · median 110 d
- Analog Devices · 40 open roles · median 57 d
How we counted: 1098 open Digital/RTL Design (RTL Design) roles from 104 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.