ASIC Design Engineer - New College Grad 2027 - CA, Santa Clara, United States
$100,000 - $189,750 USD yearly
Originally posted 28 September 2026 by the employer.
About the role
This role involves implementing leading SoCs and GPUs as part of the GPU Design team.
What you'll do
- Implement, document, and deliver high performance, area, and power efficient RTL.
- Analyze architectural trade-offs based on features, performance requirements, and system limitations.
- Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
- Collaborate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing, and back-end teams.
- Work on IPs such as GPU's work scheduler, time distribution system, interrupt controllers, and DMA engines.
- Architect features to help silicon debug and support post-silicon validation activities.
What you'll need
- Pursuing or recently completed a BS or MS in Electrical Engineering, Computer Engineering, Computer Science or related field.
- Knowledge of micro-architecture and RTL development (Verilog).
- Understanding of ASIC design flow including RTL design, verification, logic synthesis, and timing analysis.
- Exposure to Digital systems and VLSI design.
- Exposure to Computer Architecture and Computer Arithmetic.
Skills: micro-architecture, RTL, ASIC design flow, Verilog, VLSI design
This role has been open 11 days — well below the 60-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1019
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1019 roles · 98 employers) |
|---|---|---|
| Open roles in this specialty | 45 | 1019 |
| Open roles in the wider Digital Design & Verification family | 224 | 3166 · 114 employers |
| Median days open | 64 d | 60 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: micro-architecture, RTL, ASIC design flow, Verilog, VLSI design
Who's hiring in this category
- Qualcomm · 139 open roles · median 60 d
- Synopsys · 86 open roles · median 24 d
- AMD · 73 open roles · median 34 d
- Analog Devices · 50 open roles · median 41 d
- NXP Semiconductors · 48 open roles · median 78 d
- NVIDIA (this employer) · 46 open roles · median 64 d
How we counted: 1019 open Digital/RTL Design (RTL Design) roles from 98 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.