ASIC Design Engineer
$98,500 - $147,700 USD yearly
Originally posted 10 August 2026 by the employer.
About the role
This role involves contributing to ASIC and SoC development, spanning architecture, RTL design, implementation, timing analysis, design methodology, automation, and silicon bring-up activities. Engineers will work on projects in high-performance computing, AI, mobile, automotive, and data center.
What you'll do
- Participate in the architecture, design, implementation, integration, and optimization of ASIC, SoC, and IP solutions.
- Develop and validate design solutions that meet performance, power, area, timing, and quality objectives.
- Contribute to ASIC development activities including RTL design, static timing analysis, timing closure, synthesis, verification, and silicon bring-up.
- Collaborate with cross-functional teams including architecture, RTL design, physical design, verification, methodology, and software teams.
- Analyze and resolve design, implementation, and verification challenges using sound ASIC engineering practices.
- Develop and enhance design flows, methodologies, automation frameworks, and engineering tools.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- Experience in ASIC, FPGA, or SoC design and development.
- Understanding of digital design fundamentals, computer architecture, and semiconductor development processes.
- Experience with industry-standard ASIC design, implementation, verification, and/or timing analysis tools.
- Programming or scripting experience with languages such as Python, Tcl, Perl, or similar.
Nice to have
- Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
- Experience in one or more areas including RTL design, ASIC implementation, timing analysis, timing closure, verification, high-performance computing, AI/ML accelerators, data center technologies, low-power design, or silicon validation.
- Knowledge of modern SoC architectures, IP integration, and advanced process technologies.
- Experience designing arithmetic, computational, machine learning, server/data center, or related IPs.
- Experience developing tools, scripts, or automation to improve engineering productivity and design quality.
Skills: RTL design, ASIC, SoC, static timing analysis, synthesis, silicon bring-up
This role has been open 68 days — slightly above the 61-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1024
|
Median days open
61 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1024 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 140 | 1024 |
| Open roles in the wider Digital Design & Verification family | 381 | 3202 · 115 employers |
| Median days open | 63 d | 61 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL design, ASIC, SoC, static timing analysis, synthesis, silicon bring-up
Who's hiring in this category
- Qualcomm (this employer) · 140 open roles · median 63 d
- Synopsys · 86 open roles · median 31 d
- AMD · 71 open roles · median 37 d
- Analog Devices · 47 open roles · median 49 d
- NVIDIA · 44 open roles · median 59 d
- NXP Semiconductors · 42 open roles · median 85 d
How we counted: 1024 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.