Applied ML Director (Technical Team Lead) - San Jose, United States
$178,500 - $331,500 USD yearly
Originally posted 7 August 2026 by the employer.
Lead the ChipStack SuperAgent Team to enhance productivity across the semiconductor design lifecycle.
About the role
This role leads a highly technical group of ML and software engineers responsible for designing, implementing, and evaluating AI agents that enhance productivity across the semiconductor design lifecycle within Cadence’s EDA ecosystem.
What you'll do
- Manage and grow a high-performing team of ML and software engineers.
- Drive the technical vision and actively contribute to the codebase for AI agents within the ChipStack SuperAgent ecosystem.
- Guide the development of robust evaluation frameworks, data pipelines, retrieval systems (RAG), and context-engineering strategies.
- Oversee continuous integration, automated testing, and observability systems.
- Partner with product management, research, and core engineering teams to align the AI roadmap.
What you'll need
- MS or PhD in Computer Science, Computer Engineering, or a related technical field.
- 3+ years of direct engineering management or formal technical lead experience.
- 7+ years of hands-on software engineering and ML experience with expertise in design, refactoring, debugging, and testing distributed systems.
- Deep understanding of large language models (LLMs) and their deployment in production.
- Experience designing rigorous evaluation frameworks for AI systems, including benchmarking and regression testing.
Nice to have
- Hands-on experience with reason–act loops, planning/self-correction patterns, tool/function calling, persistent memory systems, and structured outputs.
- Familiarity with frontier LLMs and trade-offs across model families; practical experience with prompt engineering, context management, and model alignment techniques.
- Deep understanding of RAG pipelines, embeddings, indexing strategies, chunking methodologies, and grounding techniques.
- Experience building logging, tracing, monitoring, and evaluation systems specifically tailored for ML/AI applications.
- Interest in semiconductor design, EDA workflows, and high-performance computing environments.
Skills: Applied ML Director, AI agents, semiconductor design lifecycle, EDA ecosystem, LLMs, RAG pipelines
This role has been open 71 days — well above the 39-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · AI EDA Design
|
Open roles in category
59
|
Median days open
39 d
|
Median salary
$200k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (59 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 59 |
| Open roles in the wider Physical Implementation family | 175 | 1442 · 110 employers |
| Median days open | 71 d | 39 d (+32 d vs this employer) |
| Median salary (USD postings) | — | $200k |
Skills observed across this category: Applied ML Director, AI agents, semiconductor design lifecycle, EDA ecosystem, LLMs, RAG pipelines
Who's hiring in this category
- NXP Semiconductors · 11 open roles · median 73 d
- NVIDIA · 7 open roles · median 24 d
- Keysight Technologies · 6 open roles · median 18 d
- Cadence Design Systems (this employer) · 5 open roles · median 71 d
- Skyworks · 3 open roles · median 3 d
- Synopsys · 3 open roles · median 43 d
How we counted: 59 open EDA/CAD Engineering (AI EDA Design) roles from 23 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.