Analog & RF IC Senior Layout Engineer - United States
$109,700 - $175,500 USD yearly
Originally posted 1 July 2026 by the employer — open 71 days.
This role focuses on custom IP block design on FinFET nodes.
About the role
This role involves translating complex schematics into physical layouts for custom IP blocks. You will work on full-cycle layout from floorplanning to tape-out and sign-off, focusing on advanced FinFET nodes.
What you'll do
- Translate circuit schematics into DRC/LVS-clean layouts for critical IP blocks.
- Partner with senior designers on floorplanning, power/ground architecture, and precision device matching.
- Leverage industry-standard EDA tools for custom top-level and IP blocks.
- Participate in schedule assessments and top-level integration for projects.
- Route critical nets and match devices for peak performance in high-frequency environments.
What you'll need
- Extensive experience with the layout of high-speed custom analog and digital circuits (TX, RX, SerDes, PLLs).
- Deep familiarity with the Cadence Virtuoso tool suite, including the Virtuoso VXL layout suite and Mentor Calibre verification.
- Proven design and layout experience in advanced FinFET nodes.
- A thorough understanding of layout fundamentals and the creativity to solve complex circuit layout challenges.
Nice to have
- A BS degree in Electrical Engineering (or a related field) with 8+ years of related experience, OR an MS degree in Electrical Engineering (or a related field) with 6+ years of related experience.
Skills: Analog/RF Layout Engineer, IP block design, schematics, DRC/LVS, Cadence Virtuoso, FinFET
This role has been open 70 days — slightly above the 66-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
259
|
Median days open
66 d
|
Median salary
$156k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (259 roles · 46 employers) |
|---|---|---|
| Open roles in category | 4 | 259 |
| Median days open | 50 d | 66 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $156k |
Skills observed across this category: Analog/RF Layout Engineer, IP block design, schematics, DRC/LVS, Cadence Virtuoso, FinFET
Who's hiring in this category
- Micron Technology · 33 open roles · median 45 d
- Texas Instruments · 30 open roles · median 111 d
- NXP Semiconductors · 15 open roles · median 65 d
- Renesas Electronics · 14 open roles · median 53 d
- onsemi · 13 open roles · median 111 d
- Semtech · 11 open roles · median 83 d
How we counted: 259 open Analog IC Design (Analog Design) roles from 46 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.