Analog/RF IC Layout Design Engineer. - US-CO-Col Springs-Bldg C, United States
$117,530 - $195,880 USD yearly
Originally posted 26 May 2026 by the employer — open 107 days.
About the role
This role involves performing Analog/RF IC Layout Design, supporting a team of ASIC/MMIC designers by laying out full custom BiCMOS, CMOS, and bipolar ICs.
What you'll do
- Create transistor level layout views from schematics, spanning cell-level through top-level and full-chip assembly.
- Complete Design Rule Checking (DRC), Layout-vs-Schematic (LVS), Antenna Checks, and maintain Layout XL compliance.
- Place device primitives using best practices for thermal and device matching, such as common centroid, dummy matching, RF symmetry, and interdigitation.
- Solicit IC designers for advice and feedback on critical circuit nodes, matching requirements, and current density requirements.
- Assist the design team with IC floorplanning, creating grid cells and other custom layouts.
- Coordinate layout activities with other layout engineers and contractors.
- Complete chip level sign-off verifications.
What you'll need
- BS/MS in Electrical Engineering or applicable degree and/or relevant experience.
- 7+ years of experience with custom Analog IC Layout.
- 5+ years of experience with Cadence Virtuoso Layout XL tools, including cell level design and top-level verification tasks like full-chip DRC, LVS, and metal density/slot rules.
- Familiarity with analog design in modern sub-micron BiCMOS (130 nm and smaller).
- Knowledge of device matching, common centroid practices, and parasitic effects.
- Experience with Version Control systems (e.g., SVN, Cliosoft/SOS).
- Understanding of electro-migration (EMIR).
Nice to have
- Basic understanding of simple electrical circuits.
- Experience with Mentor Calibre DRC / LVS and similar EDA tools.
- Layout experience specifically for high-frequency (20+ GHz) bipolar signal path ICs.
- Linux fundamental knowledge.
- SKILL programming or other scripting experience.
- OCEAN experience.
Skills: Analog/RF IC Layout, full custom BiCMOS, CMOS, Cadence Virtuoso Layout XL, DRC, LVS
This role has been open 106 days — well above the 66-day median for Analog IC Design roles.
Analog IC Design · Analog Design
|
Open roles in category
259
|
Median days open
66 d
|
Median salary
$156k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Keysight Technologies | All employers we track in this specialty (259 roles · 46 employers) |
|---|---|---|
| Open roles in category | 4 | 259 |
| Median days open | 138 d | 66 d (+72 d vs this employer) |
| Median salary (USD postings) | — | $156k |
Skills observed across this category: Analog/RF IC Layout, full custom BiCMOS, CMOS, Cadence Virtuoso Layout XL, DRC, LVS
Who's hiring in this category
- Micron Technology · 33 open roles · median 45 d
- Texas Instruments · 30 open roles · median 111 d
- NXP Semiconductors · 15 open roles · median 65 d
- Renesas Electronics · 14 open roles · median 53 d
- onsemi · 13 open roles · median 111 d
- Semtech · 11 open roles · median 83 d
How we counted: 259 open Analog IC Design (Analog Design) roles from 46 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.