Analog/Mixed Signal Verilog Modeling Design Engineer - United States
$120,000 - $192,000 USD yearly
Originally posted 7 July 2026 by the employer — open 65 days.
About the role
This role involves developing Digital-Mixed Signal (DMS) models for analog IPs, including touch controller AFEs, wireless power charging, health sensing AFE, and satellite AFEs, using SystemVerilog. You will interface with analog design and chip DV teams to support analog/mixed signal models for chip verification.
What you'll do
- Develop Digital-Mixed Signal (DMS) models of analog IPs using SystemVerilog.
- Interface with analog design team to develop and support analog/mixed signal models.
- Interface with chip DV team for chip verification support.
- Understand and apply Verilog-AMS modeling language.
- Understand good coding practices for RTL of digital design and testbench creation.
- Run SV vs. schematic verification for leaf SV models.
What you'll need
- Bachelor's degree and 8+ years of related experience.
- Experience with Digital-Mixed Signal (DMS) models of analog IPs.
- Strong knowledge of SystemVerilog UDT/UDR nettype.
- Familiarity with analog circuits such as LDOs, TIAs, analog muxing, SARADC sample-and-hold (S/H), comparators, DAC voltage converter, buffering and amplification.
- Familiarity with Cadence linting & simulation tools (ncsim, xrun, vcs) and analog schematic editor.
- Hands-on skills in scripting languages (TCL/Perl/Python).
Skills: Digital-Mixed Signal (DMS) models, SystemVerilog, analog IPs, AFEs, chip verification
This role has been open 164 days — well above the 79-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
173
|
Median days open
79 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (173 roles · 44 employers) |
|---|---|---|
| Open roles in category | 7 | 173 |
| Median days open | 21 d | 79 d (−58 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: Digital-Mixed Signal (DMS) models, SystemVerilog, analog IPs, AFEs, chip verification
Who's hiring in this category
- Analog Devices · 25 open roles · median 117 d
- Infineon Technologies · 14 open roles · median 71 d
- NVIDIA · 12 open roles · median 51 d
- SiTime · 11 open roles · median 169 d
- Qualcomm · 10 open roles · median 55 d
- Microchip Technology · 8 open roles · median 168 d
How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.