Analog/Mixed-Signal SerDes Design Engineer - CA, San Jose, United States
Originally posted 29 September 2026 by the employer.
Design high-performance, multi-protocol wireline transceivers.
About the role
As an Analog/Mixed-Signal SerDes Design Engineer, you will be responsible for the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers.
What you'll do
- Define circuit architectures optimized for high bandwidth electrical and optical links
- Perform link level simulation in Matlab and/or SPICE to prove the architecture
- Perform design and modeling of on-die RF passive components (e.g., inductors and capacitors) and/or optical structures
- Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) required to implement the architecture in advanced FinFET process
What you'll need
- BS or MS or PhD in Electrical Engineering or Computer Engineering or related equivalent
- Strong background in analog and mixed-signal circuit design
Nice to have
- History of coming up with innovative circuit design/architecture is a plus
Skills: SerDes, ADC-based receivers, DAC-based transmitters, silicon photonics transceivers, link level simulation, FinFET
This role has been open 11 days — well below the 77-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
242
|
Median days open
77 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (242 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 30 | 242 |
| Open roles in the wider Analog & Mixed-Signal family | 40 | 1413 · 106 employers |
| Median days open | 38 d | 77 d (−39 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: SerDes, ADC-based receivers, DAC-based transmitters, silicon photonics transceivers, link level simulation, FinFET
Who's hiring in this category
- AMD (this employer) · 30 open roles · median 37 d
- Synopsys · 29 open roles · median 25 d
- Cadence Design Systems · 19 open roles · median 183 d
- Qualcomm · 19 open roles · median 58 d
- Micron Technology · 13 open roles · median 70 d
- Apple · 12 open roles · median 11 d
How we counted: 242 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 48 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.