Analog/Mixed-Signal SerDes Design Engineer - ON, Markham-1CV, Canada
Originally posted 10 June 2026 by the employer — open 91 days.
About the role
This role involves the design of high-speed ADC-based receivers, DAC-based transmitters, or silicon photonics transceivers. This position focuses on implementing circuit architectures in advanced FinFET process technology.
What you'll do
- Define circuit architectures for high bandwidth electrical and optical links.
- Perform link level simulation in Matlab and/or SPICE to prove architectures.
- Design and model on-die RF passive components and/or optical structures.
- Design circuit components (e.g., DAC, SAR-ADC, S/H, Analog Front-End, PLL, reference generation, clock distribution) to implement architectures.
What you'll need
- BS or MS or PhD in Electrical Engineering.
- Experience in design & simulation of analog/mixed signal circuits for SerDes links.
- Hands-on experience in CMOS circuit designs with advanced technology nodes.
- Proficient in CAD Tools for simulations and design implementation.
- Experience design of wireline and optical transceiver building blocks.
- Strong circuit design experiences in high-speed SerDes.
Nice to have
- Experience in design & simulation of ADC, DAC, CTLE, PLL, Clocking circuits for SerDes links.
Skills: high-speed ADC-based receivers, DAC-based transmitters, silicon photonics transceivers, Serdes links, FinFET process
This role has been open 91 days — exactly the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 24 | 217 |
| Median days open | 61 d | 91 d (−30 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: high-speed ADC-based receivers, DAC-based transmitters, silicon photonics transceivers, Serdes links, FinFET process
Who's hiring in this category
- AMD (this employer) · 24 open roles · median 61 d
- Cadence Design Systems · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.