Analog / Mixed-Signal PLL Design Engineer, Senior - Cork, Ireland
Analog & Mixed-Signal Design
Originally posted 25 May 2026 by the employer — open 108 days.
About the role
This role involves designing analog and mixed-signal integrated circuits for high-speed clocking IP for SoC and PHY level integration.
What you'll do
- Architect, design, and develop analog / mixed signal hard macros for high-speed clocking IP.
- Perform custom circuit design in the latest process technologies to support the delivery of clocking (PLL/DLL/FLL) IP.
- Create design specifications and behavioral models in Verilog.
- Set-up, run, and analyze circuit simulations.
- Perform quality assurance procedures on developed hard macros and deliver them, supporting customer integration and testing.
- Perform silicon characterization analysis and prepare silicon verification reports.
What you'll need
- Master's or Ph.D. degree in Science, Engineering, or related field.
- A minimum of 5 years of transistor level analog mixed-signal design experience, preferably in frequency synthesis design, high-speed wireline SerDes, DDR, or other high-speed applications.
- Experience in SPICE simulators and schematic capture tools.
- Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL, FLL.
- Industry experience in transistor-level circuit implementations or relevant academic experience focused on full custom analog circuit design using nanometer CMOS technologies.
- Good understanding of device physics, analog circuit custom layout, power distribution networks (PDN), mixed-signal design flow, SoC top-level integration, and IC Design Tools.
Nice to have
- Understanding of signal integrity in high-speed wireline design.
- Scripting to automate circuit design and verification work.
- Full-custom analog layout techniques and the ability to take a design and do all the layout extract verification and sign-off.
Skills: PLL design, high-speed clocking, analog mixed-signal, VCO, DLL, FLL