$142,400 - $213,600 USD yearly
Originally posted 30 July 2026 by the employer — open 42 days.
Design high-performance and low-power mixed-signal IPs like SerDes, DDR, PLL, DAC, ADC, and sensors.
About the role
This role involves designing analog and mixed-signal integrated circuits for various mixed-signal IPs in advanced silicon process technologies. You will contribute to Qualcomm's SOCs and RF transceiver products for 5G, AI/ML, compute, and automotive applications.
What you'll do
- Develop architecture definitions and analog/digital design partitioning for mixed-signal IPs.
- Perform schematic capture and circuit simulations using the Cadence Virtuoso tool suite.
- Collaborate with layout and digital teams on design implementation, verification, and IP delivery.
- Work with product test teams on post-silicon verification, bringup, debug, and production support.
What you'll need
- Master's degree in Electrical Engineering or related field.
- Demonstrated interest in analog circuit design.
- Experience with ASIC design tools such as Cadence Virtuoso.
- Bachelor's Degree in Electrical Engineering with 2+ years of experience with analog or mixed-signal integrated circuit design in nanometer planar CMOS or FinFET and 4+ years of ASIC design, verification, or related work experience, OR Master's degree in Electrical Engineering or related field and 4+ years of ASIC design, verification, or related work experience, OR PhD in Electrical Engineering or related field and 2+ years of ASIC design, verification, or related work experience.
- 2+ years of experience using one or more design tools (e.g., CADENCE, SPICE, MATLAB, and/or Verilog/VHDL).
Nice to have
- Several years of industry experience in analog integrated circuit/system design.
- Experience as an analog designer of mixed-signal IPs, such as SerDes, DDR, PLL, DAC, ADC, sensors.
- Familiarity with Matlab and Python.
- Good understanding of architecture, system, and integration aspects for mixed-signal.
- Good understanding of design for yield and production challenges.
- Good understanding of Signals and Systems.
- Good understanding of Sampled Domain signal processing.
Skills: mixed-signal IP, analog design, schematic capture, Cadence Virtuoso, post-silicon verification
This role has been open 41 days — well below the 79-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
173
|
Median days open
79 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (173 roles · 44 employers) |
|---|---|---|
| Open roles in category | 10 | 173 |
| Median days open | 55 d | 79 d (−24 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: mixed-signal IP, analog design, schematic capture, Cadence Virtuoso, post-silicon verification
Who's hiring in this category
- Analog Devices · 25 open roles · median 117 d
- Infineon Technologies · 14 open roles · median 71 d
- NVIDIA · 12 open roles · median 51 d
- SiTime · 11 open roles · median 169 d
- Qualcomm (this employer) · 10 open roles · median 55 d
- Microchip Technology · 8 open roles · median 168 d
How we counted: 173 open Mixed-Signal Design (Mixed Signal) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.