Skip to main content
Synopsys

Analog Design, Principal Engineer- 18339

Synopsys img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Markham, Canada 2 months ago
Analog & Mixed-Signal Design

Originally posted 12 August 2026 by the employer.

About the role

This role involves designing and optimizing high-speed analog circuits, with a focus on SerDes.

What you'll do

  • Review SerDes standards and develop analog sub-block specifications
  • Design and optimize high-speed analog circuits
  • Propose and execute verification strategies
  • Collaborate with layout and digital teams
  • Present simulation results to peers and customers
  • Mentor junior engineers and document designs

What you'll need

  • 8+ years' CMOS analog/mixed-signal design experience
  • Expertise in transistor-level design and SerDes circuits
  • Hands-on experience with FinFET layout optimization
  • Proficiency with SPICE simulators, EDA tools, and scripting (Python, TCL)
  • Knowledge of reliability and ESD design techniques

Skills: SerDes, high-speed analog circuits, transistor-level design, FinFET layout, SPICE simulators, CMOS analog/mixed-signal

Market context

This role has been open 46 days — well below the 76-day median for High-Speed IO/SerDes Design roles.

High-Speed IO/SerDes Design · Serdes Highspeed

Open roles in category
239
Median days open
76 d
Median salary
$177k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Synopsys compares in High-Speed IO/SerDes Design hiring
Metric Synopsys All employers we track in this specialty (239 roles · 49 employers)
Open roles in this specialty 26 239
Open roles in the wider Analog & Mixed-Signal family 36 1385 · 107 employers
Median days open 44 d 76 d (−32 d vs this employer)
Median salary (USD postings) — $177k

Skills observed across this category: SerDes, high-speed analog circuits, transistor-level design, FinFET layout, SPICE simulators, CMOS analog/mixed-signal

Who's hiring in this category

  • AMD · 28 open roles · median 64 d
  • Synopsys (this employer) · 26 open roles · median 44 d
  • Qualcomm · 20 open roles · median 58 d
  • Cadence Design Systems · 18 open roles · median 181 d
  • Apple · 12 open roles · median 7 d
  • NVIDIA · 11 open roles · median 116 d

How we counted: 239 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 49 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.

Synopsys

Synopsys

Apply now
img src="https://tbcdn.talentbrew.com/company/44408/gst_v1/img/icon-map-black.png" height="15" width="15" alt="pin icon">Markham, Canada
On-site
2 months ago

Share this job