Analog Design Engineer II - Nanjing, China
Analog & Mixed-Signal Design
Originally posted 2 July 2026 by the employer — open 70 days.
About the role
This role involves the design, simulation, and verification of high-speed SerDes interface circuits.
What you'll do
- Design, simulate, and verify high-speed SerDes interface circuits.
- Develop AMS models for high-speed analog circuit modules and support IP verification.
- Define IC module performance specifications and create design documentation.
- Design IC modules and provide guidance for layout implementation.
- Support chip testing, performance validation, and laboratory debugging.
What you'll need
- Master’s degree or above in Microelectronics, Circuits and Systems, or related fields.
- Strong foundation in analog circuit analysis and understanding.
- Proficiency in using Cadence custom circuit design tools (Virtuoso, Spectre).
- Ability to independently complete technical tasks, perform manual analysis and verification, testing, and quantify work results.
Nice to have
- Theoretical and practical experience in electromagnetic fields, transmission lines, spiral inductors, or resonant circuits.
Skills: SerDes, analog circuit design, Cadence Virtuoso, high-speed interface, AMS models
Market context
This role has been open 70 days — well below the 91-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
217
|
Median days open
91 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (217 roles · 44 employers) |
|---|---|---|
| Open roles in category | 19 | 217 |
| Median days open | 153 d | 91 d (+62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SerDes, analog circuit design, Cadence Virtuoso, high-speed interface, AMS models
Who's hiring in this category
- AMD · 24 open roles · median 61 d
- Cadence Design Systems (this employer) · 19 open roles · median 153 d
- Qualcomm · 17 open roles · median 74 d
- Synopsys · 16 open roles · median 53 d
- Broadcom · 11 open roles · median 142 d
- NVIDIA · 10 open roles · median 95 d
How we counted: 217 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 44 employers tracked in the SemiconductorJobs index, counted 10 Sept 2026. Figures refresh nightly.