AI Systems, Model Optimization
Originally posted April 3, 2026 by the employer. Relisted by the employer on November 14, 2026.
About the role
As a Member of Technical Staff in AI Systems, Model Optimization, you will develop the path from model architecture to physical silicon. You will develop training techniques, optimization strategies, and infrastructure to run models efficiently on novel compute substrates, connecting model design to tapeout.
What you'll do
- Develop performance models to evaluate compute, memory, and energy trade-offs, tracking pareto-optimality across models and hardware configurations.
- Drive the partitioning and mapping of complex models to hardware using custom quantization schemes, sparsity/pruning, and distillation.
- Develop and apply Quantization-Aware Training (QAT), noise-aware training, and sparsification techniques for analog compute substrates.
- Develop and optimize kernels using low-level programming models including CUDA, Triton, or CUTLASS, profiling bottlenecks in training and inference.
- Translate between model architects and hardware engineering teams to convert model requirements into specifications for tapeouts.
What you'll need
- MS, PhD, or equivalent research/project experience in AI/Machine Learning, Computer Science, Physics, Electrical Engineering, or Applied Math.
- Practical understanding of the modern AI/ML stack and optimized compilation and execution of algorithms on modern GPU systems, including profiling and debugging performance bottlenecks.
- Demonstrated ability to map model architectures (such as Transformers, Mixture of Experts, diffusion models) to system performance and apply sparsity, quantization, and distillation.
- Experience with PyTorch internals, torch.compile, and distributed training libraries including DDP and FSDP.
Nice to have
- Experience with production-grade training frameworks such as Megatron-LM or DeepSpeed and distributed training at scale.
- Experience co-designing training systems for computing paradigms that map closely to the physics of underlying systems.
- Research or practical experience in advanced approximation/compression techniques beyond standard quantization, including noise-aware or physics-constrained training.
Skills: AI systems, model optimization, ML models, hardware optimization
More semiconductor jobs: AI chip design jobs
First seen in our index 110 days ago, slightly above the 107-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
482
|
Median days since first seen
107 d
|
Category median salary (all employers)
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Unconventional AI | All employers we track in this specialty (482 roles · 72 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 482 |
| Open roles in the wider Software, Firmware & Systems family | 6 | 6731 · 166 employers |
| Median days since first seen | 110 d | 107 d (−3 d vs this employer) |
| Median salary (USD postings) | n/a | $236k |
Skills observed across this category: AI systems, model optimization, ML models, hardware optimization
Who's hiring in this category
- NVIDIA · 109 open roles · median 88 d
- Qualcomm · 104 open roles · median 123 d
- AMD · 21 open roles · median 128 d
- Micron Technology · 15 open roles · median 72 d
- Mobileye · 15 open roles · median 102 d
- Analog Devices · 14 open roles · median 51 d
How we counted: 482 open AI/ML Hardware Engineering (AI ML Hardware) roles from 72 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Software, Firmware & Systems family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.