AI Silicon, Digital Design Engineer
Originally posted April 3, 2026 by the employer. Relisted by the employer on November 14, 2026.
About the role
This role drives the invention, prototyping, and validation of core digital components for a novel computing platform. You will lead micro-architecture definition and top-level integration of digital blocks, including CPU, memory subsystems, and interfaces.
What you'll do
- Lead detailed micro-architecture definition and top-level integration of digital blocks, including CPU, memory subsystems, interfaces, and third-party IP into the main SoC fabric.
- Drive hands-on RTL design for timing-critical SoC blocks and digital interfaces to meet power, performance, and area (PPA) targets.
- Perform initial synthesis, create block-level timing constraints, and run formal verification (LEC) to ensure routability and target frequencies.
- Run and resolve RTL linting, Clock Domain Crossing (CDC), and Reset Domain Crossing (RDC) checks using industry-standard tools.
- Support design verification (DV) by participating in block-level verification plans, developing verification environments, and triaging complex simulation failures.
- Facilitate hand-off between internal design and physical implementation teams for synthesis and timing closure.
What you'll need
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
- 8+ years of industry experience in digital ASIC/SoC design.
- Expertise in Verilog RTL coding and digital design fundamentals.
- Familiarity with standard EDA tools for simulation, synthesis, linting, and clock domain crossing (CDC) analysis.
- Understanding of the full ASIC design flow, from specification to tape-out.
- Demonstrated ability to lead and mentor junior engineers.
Nice to have
- Experience with creating digital designs, including synchronous and asynchronous logic, state machines, and bus protocols.
- Experience developing scripts or tooling for design automation.
- Experience optimizing designs for performance, power, or area.
- Experience with modern design methods, including generative AI code development platforms.
- Experience with analog mixed signal technology and interfaces.
More semiconductor jobs: RTL design jobs · Mountain View jobs
First seen in our index 110 days ago, well above the 66-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1070
|
Median days since first seen
66 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Unconventional AI | All employers we track in this specialty (1070 roles · 105 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 1070 |
| Open roles in the wider Digital Design & Verification family | 7 | 3639 · 123 employers |
| Median days since first seen | 110 d | 66 d (−44 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Who's hiring in this category
- Qualcomm · 147 open roles · median 75 d
- AMD · 92 open roles · median 58 d
- Synopsys · 86 open roles · median 53 d
- NVIDIA · 48 open roles · median 70 d
- NXP Semiconductors · 43 open roles · median 108 d
- Analog Devices · 36 open roles · median 63 d
How we counted: 1070 open Digital/RTL Design (RTL Design) roles from 105 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.